High speed VLSI implementation of a finite field multiplier using redundant representation

A High-Speed Word Level Finite Field Multiplier in ${\BBF}_{2^m}$ Using Redundant Representation

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2008.2003005 ◽

2009 ◽

Vol 17 (10) ◽

pp. 1546-1550 ◽

Cited By ~ 6

Author(s):

A.H. Namin ◽

Huapeng Wu ◽

M. Ahmadi

Keyword(s):

Finite Field ◽

High Speed ◽

Word Level ◽

Finite Field Multiplier ◽

A high speed word level finite field multiplier using reordered normal basis

2008 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2008.4542158 ◽

2008 ◽

Cited By ~ 5

Author(s):

Ashkan Hosseinzadeh Namin ◽

Huapeng Wu ◽

Majid Ahmadi

Keyword(s):

Finite Field ◽

High Speed ◽

Normal Basis ◽

Word Level ◽

Efficient VLSI Implementation of a Sequential Finite Field Multiplier Using Reordered Normal Basis in Domino Logic

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2018.2851958 ◽

2018 ◽

Vol 26 (11) ◽

pp. 2542-2552

Author(s):

Parham Hosseinzadeh Namin ◽

Crystal Roma ◽

Roberto Muscedere ◽

Majid Ahmadi

Keyword(s):

Finite Field ◽

Normal Basis ◽

Vlsi Implementation ◽

Domino Logic ◽

Efficient VLSI implementation of a finite field multiplier using reordered normal basis

2010 53rd IEEE International Midwest Symposium on Circuits and Systems ◽

10.1109/mwscas.2010.5548774 ◽

2010 ◽

Cited By ~ 1

Author(s):

Karl Leboeuf ◽

Ashkan Hosseinzadeh Namin ◽

Huapeng Wu ◽

Roberto Muscedere ◽

Majid Ahmadi

Keyword(s):

Finite Field ◽

Normal Basis ◽

Vlsi Implementation ◽

Corrections to ``An Efficient and High-Speed Overlap-Free Karatsuba-Based Finite-Field Multiplier for FPGA Implementation''

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2021.3114580 ◽

2021 ◽

pp. 1-1

Author(s):

Moslem Heidarpur ◽

Mitra Mirhassani

Keyword(s):

Finite Field ◽

High Speed ◽

Fpga Implementation ◽

An Efficient Finite Field Multiplier Using Redundant Representation

ACM Transactions on Embedded Computing Systems ◽

10.1145/2220336.2220343 ◽

2012 ◽

Vol 11 (2) ◽

pp. 1-14 ◽

Cited By ~ 4

Author(s):

Ashkan Hosseinzadeh Namin ◽

Huapeng Wu ◽

Majid Ahmadi

Keyword(s):

Finite Field ◽

Finite Field Multiplier ◽

Finite field multiplier using redundant representation

IEEE Transactions on Computers ◽

10.1109/tc.2002.1047755 ◽

2002 ◽

Vol 51 (11) ◽

pp. 1306-1316 ◽

Cited By ~ 51

Author(s):

Huapeng Wu ◽

M.A. Hasan ◽

I.F. Blake ◽

Shuhong Gao

Keyword(s):

Finite Field ◽

Finite Field Multiplier ◽

An Efficient and High-Speed Overlap-Free Karatsuba-Based Finite-Field Multiplier for FGPA Implementation

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2021.3058509 ◽

2021 ◽

pp. 1-10

Author(s):

Moslem Heidarpur ◽

Mitra Mirhassani

Keyword(s):

Finite Field ◽

High Speed ◽

Conference Record of the Thirty-Ninth Asilomar Conference onSignals, Systems and Computers, 2005. ◽

High Speed Word-parallel Bit-Serial Normal Basis Finite Field Multiplier and Its FPGA Implementation

10.1109/acssc.2005.1599981 ◽

2006 ◽

Cited By ~ 2

Author(s):

A.H. Namin ◽

Huapeng Wu ◽

M. Ahmadi

Keyword(s):

Finite Field ◽

High Speed ◽

Fpga Implementation ◽

Normal Basis ◽

Finite Field Multiplier ◽

Bit Serial

A New Finite-Field Multiplier Using Redundant Representation

IEEE Transactions on Computers ◽

10.1109/tc.2007.70834 ◽

2008 ◽

Vol 57 (5) ◽

pp. 716-720 ◽

Cited By ~ 11

Author(s):

Ashkan Hosseinzadeh Namin ◽

Huapeng Wu ◽

Majid Ahmadi

Keyword(s):

Finite Field ◽

Finite Field Multiplier ◽