Development and Implementation of the H.264-Codec Deblocking Filter Based on the MIPS SIMD Architecture

2021 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus) ◽

10.1109/elconrus51938.2021.9396406 ◽

2021 ◽

Author(s):

Danil Bogaevskiy ◽

Maxim Minenko ◽

Sergey Ezhov ◽

Dmitrii I. Kaplun

Keyword(s):

Deblocking Filter ◽

Simd Architecture

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A 64Cycles/MB, Luma-Chroma Parallelized H.264/AVC Deblocking Filter for 4K × 2K Applications

IEICE Transactions on Electronics ◽

10.1587/transele.e95.c.441 ◽

2012 ◽

Vol E95-C (4) ◽

pp. 441-446 ◽

Author(s):

Weiwei SHEN ◽

Yibo FAN ◽

Xiaoyang ZENG

Keyword(s):

Deblocking Filter

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Analysis of Deblocking Filter for Efficienct Video Coding by Various Multicore Processor Based on Paralliazation

SSRN Electronic Journal ◽

10.2139/ssrn.3551068 ◽

2020 ◽

Author(s):

Burgoji santhosh kumar ◽

Sudhir Kumar Sharma

Keyword(s):

Video Coding ◽

Deblocking Filter ◽

Multicore Processor

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A Fast Two Dimensional Deblocking Filter for H.264/AVC Video Coding

2006 Canadian Conference on Electrical and Computer Engineering ◽

10.1109/ccece.2006.277364 ◽

2006 ◽

Author(s):

Mahdi Bojnordi ◽

Mahmoud Hashemi ◽

Omid Fatemi

Keyword(s):

Video Coding ◽

Two Dimensional ◽

Deblocking Filter

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A parallel camera image signal processor for SIMD architecture

EURASIP Journal on Image and Video Processing ◽

10.1186/s13640-016-0137-2 ◽

2016 ◽

Vol 2016 (1) ◽

Author(s):

Seung-Hyun Choi ◽

Junguk Cho ◽

Yong-Min Tai ◽

Seong-Won Lee

Keyword(s):

Camera Image ◽

Simd Architecture ◽

Image Signal Processor ◽

Signal Processor

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An efficient deblocking filter architecture with 2-dimensional parallel memory for H.264/AVC

Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005. ◽

10.1109/aspdac.2005.1466238 ◽

2005 ◽

Author(s):

Lingfeng Li ◽

S. Goto ◽

T. Ikenaga

Keyword(s):

Deblocking Filter ◽

Parallel Memory ◽

Filter Architecture

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Graph-based parallelization algorithm for deblocking filter in H.264/AVC

2013 IEEE International Conference on Consumer Electronics (ICCE) ◽

10.1109/icce.2013.6486920 ◽

2013 ◽

Author(s):

Seongmin Jo ◽

Yong Ho Song

Keyword(s):

Deblocking Filter

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Design of a novel SIMD architecture by fusing operations and registers

Proceedings of the 23rd international conference on Conference on Supercomputing - ICS '09 ◽

10.1145/1542275.1542351 ◽

2009 ◽

Author(s):

Jih-Ching Chiu ◽

Kai-Ming Yang ◽

Yu-Liang Chou

Keyword(s):

Simd Architecture

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A multi-functional dot product unit with SIMD architecture for embedded 3D graphics engine

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2011.6026308 ◽

2011 ◽

Author(s):

Yisong Chang ◽

Jizeng Wei ◽

Wei Guo ◽

Jizhou Sun

Keyword(s):

3D Graphics ◽

Simd Architecture ◽

Dot Product ◽

Graphics Engine

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A high performance 5 stage pipeline architecture for the H.264/AVC deblocking filter

Integration ◽

10.1016/j.vlsi.2014.10.002 ◽

2015 ◽

Vol 49 ◽

pp. 65-77

Author(s):

N. Kefalas ◽

G. Theodoridis

Keyword(s):

High Performance ◽

Deblocking Filter ◽

Pipeline Architecture

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An SRAM-free HEVC Deblocking Filter VLSI Architecture for 8K Application

2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) ◽

10.1109/icsict.2018.8565040 ◽

2018 ◽

Author(s):

Genwei Tang ◽

Xiaoyang Zeng ◽

Yibo Fan

Keyword(s):

Vlsi Architecture ◽

Deblocking Filter

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