Hardware Implementation of Pixel Comparison and Error Detection in Image

2020 4th International Conference on Trends in Electronics and Informatics (ICOEI)(48184) ◽

10.1109/icoei48184.2020.9142900 ◽

2020 ◽

Author(s):

Viyyuri Sarath Chandra ◽

K. Madhava Rao ◽

Apurva Kumari

Keyword(s):

Error Detection ◽

Hardware Implementation

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Simple error detection methods for hardware implementation of Advanced Encryption Standard

IEEE Transactions on Computers ◽

10.1109/tc.2006.90 ◽

2006 ◽

Vol 55 (6) ◽

pp. 720-731 ◽

Author(s):

Chih-Hsu Yen ◽

Bing-Fei Wu

Keyword(s):

Error Detection ◽

Hardware Implementation ◽

Detection Methods ◽

Advanced Encryption Standard ◽

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Compact Hardware Implementation of the Block Cipher Camellia with Concurrent Error Detection

2007 Canadian Conference on Electrical and Computer Engineering ◽

10.1109/ccece.2007.287 ◽

2007 ◽

Author(s):

Huiju Cheng ◽

Howard M. Heys

Keyword(s):

Error Detection ◽

Hardware Implementation ◽

Block Cipher ◽

Concurrent Error Detection

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Prevention or Cure? Error Detection and Correction in Skilled Typists

PsycEXTRA Dataset ◽

10.1037/e502412013-119 ◽

2012 ◽

Author(s):

Gordon D. Logan ◽

Matthew J. C. Crump

Keyword(s):

Error Detection ◽

Error Detection And Correction

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Hierarchical error detection produces cognitive illusions of authorship in skilled typing

PsycEXTRA Dataset ◽

10.1037/e520592012-020 ◽

2010 ◽

Author(s):

Gordon D. Logan ◽

Matthew J. C. Crump

Keyword(s):

Error Detection ◽

Cognitive Illusions

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Concurrent error detection in array dividers by alternating input data

IEE Proceedings E Computers and Digital Techniques ◽

10.1049/ip-e.1992.0019 ◽

1992 ◽

Vol 139 (2) ◽

pp. 123 ◽

Author(s):

C.-L. Wey

Keyword(s):

Error Detection ◽

Concurrent Error Detection

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Space—time mapping, latency of data flow and concurrent error detection in systolic arrays

IEE Proceedings E Computers and Digital Techniques ◽

10.1049/ip-e.1993.0004 ◽

1993 ◽

Vol 140 (1) ◽

pp. 33

Author(s):

H.F. Li ◽

C.N. Zhang ◽

R. Jayakumar

Keyword(s):

Error Detection ◽

Data Flow ◽

Systolic Arrays ◽

Concurrent Error Detection

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Design of Multidirectional Parity Code Using Hamming Code Technique for Error Detection and Correction

PARIPEX-INDIAN JOURNAL OF RESEARCH ◽

10.15373/22501991/may2014/27 ◽

2012 ◽

Vol 3 (5) ◽

pp. 79-81

Author(s):

Vishal Badole ◽

◽

Amit Udawat

Keyword(s):

Error Detection ◽

Hamming Code ◽

Code Technique ◽

Error Detection And Correction

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Hardware Implementation Of Iris Matching

International Journal of Scientific Research ◽

10.15373/22778179/nov2012/16 ◽

2012 ◽

Vol 1 (6) ◽

pp. 46-48

Author(s):

Bethuna Bethuna ◽

Keyword(s):

Hardware Implementation

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An Improvement of Rate-Distortion Optimized Quantization Process and its Hardware Implementation

IEEJ Transactions on Electronics Information and Systems ◽

10.1541/ieejeiss.135.1299 ◽

2015 ◽

Vol 135 (11) ◽

pp. 1299-1306

Author(s):

Genki Moriguchi ◽

Takashi Kambe ◽

Gen Fujita ◽

Hajime Sawano

Keyword(s):

Hardware Implementation ◽

Rate Distortion

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An efficient hardware implementation of SM4

10.24104/rmhe/2017.04.01001 ◽

2017 ◽

Author(s):

Huafeng Chen ◽

Keyword(s):

Hardware Implementation

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