FPGA-based Implementation of SHA-256 with Improvement of Throughput using Unfolding Transformation

Security has grown in importance as a study issue in recent years. Several cryptographic algorithms have been created to increase the performance of these information-protecting methods. One of the cryptography categories is a hash function. This paper proposes the implementation of the SHA-256 (Secure Hash Algorithm-256) hash function. The unfolding transformation approach was presented in this study to enhance the throughput of the SHA-256 design. The unfolding method is employed in the hash function by producing the hash value output based on modifying the SHA-256 structure. In this unfolding method, SHA-256 decreases the number of clock cycles required for traditional architecture by a factor of two, from 64 to 34 because of the delay. To put it another way, one cycle of the SHA-256 design can generate up to four parallel inputs for the output. As a result, the throughput of the SHA-256 design can be improved by reducing the number of cycles by 16 cycles. ModelSim was used to validate the output simulations created in Verilog code. The SHA-256 hash function factor four hardware implementation was successfully tested using the Altera DE2-115 FPGA board. According to timing simulation findings, the suggested unfolding hash function with factor four provides the most significant throughput of around 4196.30 Mbps. In contrast, the suggested unfolding with factor two surpassed the classic SHA-256 design in terms of maximum frequency. As a result, the throughput of SHA-256 increases 13.7% compared to unfolding factor two and 58.1% improvement from the conventional design of SHA-256 design.

Design of an OCR System and its Hardware Implementation

In this paper, we present a scheme to develop to complete OCR system for printed text English Alphabet of Uppercase of different font and of different sizes so that we can use this system in Banking, Corporate, Legal industry and so on. OCR system consists of different modules like preprocessing, segmentation, feature extraction and recognition. In preprocessing step it is expected to include image gray level conversion, binary conversion etc. After finding out the feature of the segmented characters artificial neural network and can be used for Character Recognition purpose. Efforts have been made to improve the performance of character recognition using artificial neural network techniques. The proposed OCR system is capable of accepting printed document images from a file and implemented using MATLAB R2014a version. Key words: OCR, Printed text, Barcode recognition

Information Conversion in Measuring Channels with Optoelectronic Sensors

The purpose of this work is the authors’ attempt to identify the main phases of information transformation in measurement channels on the example of an optical measurement channel with microprocessor control. The authors include such phases: hardware implementation and analytical representation of an optical sensor`s converting functions and a current-to-voltage converter; based on the methods of experimental computer science, the converting functions and sensitivity are deduced, analytical dependences for estimation of a range of measurement are obtained. It is shown that the choice of information transmission type in the microprocessor measuring channel significantly affects the speed of the measuring channel. Based on the uncertainty in the form of entropy before and after measurements, the amount of information for measuring channels with optoelectronic sensors is estimated. The application of the results obtained in the work allows even at the design stage of physical and mathematical modeling to assess the basic static metrological characteristics of measuring channels, aimed at reducing the stage of development and debugging of hardware and software and standardization of their metrological characteristics.

5G F-OFDM Waveform Based Software-Defined Radio Technology

Filtered-orthogonal frequency division multiplexing (F-OFDM) is a quasi-orthogonal waveform candidate for the applications of the fifth generation (5G) communication system. In this study, an F-OFDM waveform with unequal sub-band sizes is proposed to improve the spectrum efficiency (SE) of the 5G system. The proposed waveform is modeled with the Blackman window-sinc filter and is developed based on the software-defined radio (SDR) technology for practical implementation. The result shows that the F-OFDM performance of the simulation and hardware implementation is approximately the same. The SE using the proposed F-OFDM waveform is 6% and 5.8% higher than the SE using the conventional OFDM waveform under the simulation in the LabVIEW NXG simulator and under the practical use in the universal software radio peripheral (USRP) platform, respectively.

Novel Low Complexity BP Decoding Algorithms for Polar Codes: Simplifying on Non-Linear Operations

The parallel nature of the belief propagation (BP) decoding algorithm for polar codes opens up a real possibility of high throughput and low decoding latency during hardware implementation. To address the problem that the BP decoding algorithm introduces high-complexity non-linear operations in the iterative messages update process, this paper proposes to simplify these operations and develops two novel low complexity BP decoding algorithms, namely, exponential BP (Exp-BP) decoding algorithm and quantization function BP (QF-BP) decoding algorithm. The proposed algorithms simplify the compound hyperbolic tangent function by using probability distribution fitting techniques. Specifically, the Exp-BP algorithm simplifies two types of non-linear operations into single non-linear operation using the piece-wise exponential model function, which can approximate the hyperbolic tangent function in the updating formula. The QF-BP algorithm eliminates non-linear operations using the non-uniform quantization in the updating formula, which is effective in reducing computational complexity. According to the simulation results, the proposed algorithms can reduce the computational complexity up to 50% in each iteration with a loss of less than 0.1 dB compared with the BP decoding algorithm, which can facilitate the hardware implementation.