Analog circuit sizing with constraint programming modeling and minimax optimization

Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97 ◽

10.1109/iscas.1997.621412 ◽

2002 ◽

Author(s):

F. Leyn ◽

W. Daems ◽

G. Gielen ◽

W. Sansen

Keyword(s):

Constraint Programming ◽

Analog Circuit ◽

Minimax Optimization ◽

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Adaptive response surface modeling-based method for analog circuit sizing

IEEE International SOC Conference, 2004. Proceedings. ◽

10.1109/socc.2004.1362368 ◽

2004 ◽

Author(s):

Donghoon Han ◽

A. Chattejee

Keyword(s):

Response Surface ◽

Adaptive Response ◽

Analog Circuit ◽

Surface Modeling ◽

Response Surface Modeling ◽

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Process Variation-Aware Analog Circuit Sizing: Uncertain Optimization

Automated Design of Analog and High-frequency Circuits - Studies in Computational Intelligence ◽

10.1007/978-3-642-39162-0_5 ◽

2013 ◽

pp. 85-105

Author(s):

Bo Liu ◽

Georges Gielen ◽

Francisco V. Fernández

Keyword(s):

Analog Circuit ◽

Process Variation ◽

Circuit Sizing ◽

Uncertain Optimization

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Analog circuit sizing based on formal methods using affine arithmetic

IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002. ◽

10.1145/774572.774643 ◽

2002 ◽

Author(s):

Andreas Lemke ◽

Lars Hedrich ◽

Erich Barke

Keyword(s):

Formal Methods ◽

Analog Circuit ◽

Affine Arithmetic ◽

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DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks

10.1109/dac18074.2021.9586139 ◽

2021 ◽

Author(s):

Ahmet F. Budak ◽

Prateek Bhansali ◽

Bo Liu ◽

Nan Sun ◽

David Z. Pan ◽

...

Keyword(s):

Neural Networks ◽

Deep Neural Networks ◽

Analog Circuit ◽

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Application of Deep Learning in Analog Circuit Sizing

Proceedings of the 2018 2nd International Conference on Computer Science and Artificial Intelligence - CSAI '18 ◽

10.1145/3297156.3297160 ◽

2018 ◽

Author(s):

Zhenyu Wang ◽

Xiangzhong Luo ◽

Zheng Gong

Keyword(s):

Deep Learning ◽

Analog Circuit ◽

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Analog circuit sizing based on formal methods using affine arithmetic

IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002. ◽

10.1109/iccad.2002.1167576 ◽

2003 ◽

Author(s):

A. Lemke ◽

L. Hedrich ◽

E. Barke

Keyword(s):

Formal Methods ◽

Analog Circuit ◽

Affine Arithmetic ◽

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Analog circuit sizing using local biasing

Analog Integrated Circuits and Signal Processing ◽

10.1007/s10470-017-1017-0 ◽

2017 ◽

Vol 93 (2) ◽

pp. 299-308 ◽

Author(s):

Srdjan Dragomira Djordjevic

Keyword(s):

Analog Circuit ◽

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Analog circuit sizing using adaptive worst-case parameter sets

Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition ◽

10.1109/date.2002.998359 ◽

2003 ◽

Author(s):

R. Schwencker ◽

F. Schenkel ◽

M. Pronath ◽

H. Graeb

Keyword(s):

Analog Circuit ◽

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Iterative Performance Model Upgradation in Geometric Programming Based Analog Circuit Sizing for Improved Design Accuracy

2012 25th International Conference on VLSI Design ◽

10.1109/vlsid.2012.100 ◽

2012 ◽

Author(s):

Samiran Dam ◽

Pradip Mandal

Keyword(s):

Geometric Programming ◽

Analog Circuit ◽

Performance Model ◽

Circuit Sizing ◽

Improved Design

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A Hybrid Quasi Monte Carlo Method for Yield Aware Analog Circuit Sizing Tool

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 ◽

10.7873/date.2015.0656 ◽

2015 ◽

Author(s):

Engin Afacan ◽

Gönenç Berkol ◽

Ali Emre Pusane ◽

Günhan Dündar ◽

Faik Başkaya

Keyword(s):

Monte Carlo ◽

Monte Carlo Method ◽

Analog Circuit ◽

Quasi Monte Carlo ◽

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