A Memory-Effective Fault-Tolerant Routing Strategy for Direct Interconnection Networks

A Memory-Effective Routing Strategy for Regular Interconnection Networks

19th IEEE International Parallel and Distributed Processing Symposium ◽

10.1109/ipdps.2005.44 ◽

2005 ◽

Cited By ~ 14

Author(s):

M.E. Gomez ◽

P. Lopez ◽

J. Duato

Keyword(s):

Interconnection Networks ◽

Routing Strategy

Fault Tolerant Routing Algorithm for OTIS 2D Torus Interconnection Networks

Sixth International Conference on Advances in Computing Communication and Information Technology CCIT 2018 ◽

10.15224/978-1-63248-149-8-13 ◽

2018 ◽

Author(s):

JEHAD AHMED

Keyword(s):

Interconnection Networks ◽

Fault Tolerant ◽

Routing Algorithm ◽

2D Torus

Design of a Viable Fault-Tolerant Routing Strategy for Optical-Based Grids

Parallel and Distributed Processing and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-37619-4_13 ◽

2003 ◽

pp. 112-126 ◽

Cited By ~ 4

Author(s):

Peter K. K. Loh ◽

W. J. Hsu

Keyword(s):

Fault Tolerant ◽

Routing Strategy

A Novel Node-to-Set Node-Disjoint Fault-Tolerant Routing Strategy in Hypercube

Communications in Computer and Information Science - Advanced Computer Architecture ◽

10.1007/978-3-662-44491-7_5 ◽

2014 ◽

pp. 58-67 ◽

Cited By ~ 1

Author(s):

Endong Wang ◽

Hongwei Wang ◽

Jicheng Chen ◽

Weifeng Gong ◽

Fan Ni

Keyword(s):

Fault Tolerant ◽

Routing Strategy

Shuffled tree based fault-tolerant hierarchical interconnection networks

DIMACS Series in Discrete Mathematics and Theoretical Computer Science - Interconnection Networks and Mapping and Scheduling Parallel Computations ◽

10.1090/dimacs/021/17 ◽

1995 ◽

pp. 251-265

Author(s):

O Karam ◽

Dharma Agrawal

Keyword(s):

Interconnection Networks ◽

Fault Tolerant

Tighter bounds on full access probability in fault-tolerant multistage interconnection networks

IEEE Transactions on Parallel and Distributed Systems ◽

10.1109/71.755833 ◽

1999 ◽

Vol 10 (3) ◽

pp. 328-335 ◽

Cited By ~ 4

Author(s):

Suresh Rai ◽

Y.C. Oh

Keyword(s):

Interconnection Networks ◽

Fault Tolerant ◽

Multistage Interconnection Networks

On fault-tolerant embedding of Hamiltonian circuits in line digraph interconnection networks

Information Processing Letters ◽

10.1016/0020-0190(96)00011-7 ◽

1996 ◽

Vol 57 (5) ◽

pp. 265-271

Author(s):

Suresh Viswanathan ◽

Éva Czabarka ◽

Abhijit Sengupta

Keyword(s):

Interconnection Networks ◽

Fault Tolerant ◽

Line Digraph ◽

Hamiltonian Circuits

THE CUBE-OF-RINGS INTERCONNECTION NETWORK

International Journal of Foundations of Computer Science ◽

10.1142/s0129054198000052 ◽

1998 ◽

Vol 09 (01) ◽

pp. 25-37 ◽

Cited By ~ 3

Author(s):

THOMAS J. CORTINA ◽

ZHIWEI XU

Keyword(s):

Graph Theory ◽

Interconnection Networks ◽

Fault Tolerant ◽

Interconnection Network ◽

Routing Algorithm ◽

Parallel Computers ◽

Closed Form Expression ◽

Form Expression ◽

Graph Theoretic ◽

Basic Graph

We present a family of interconnection networks named the Cube-Of-Rings (COR) networks along with their basic graph-theoretic properties. Aspects of group graph theory are used to show the COR networks are symmetric and optimally fault tolerant. We present a closed-form expression of the diameter and optimal one-to-one routing algorithm for any member of the COR family. We also discuss the suitability of the COR networks as the interconnection network of scalable parallel computers.

Fault-tolerant diameter for three family interconnection networks

Journal of Combinatorial Optimization ◽

10.1007/s10878-010-9362-2 ◽

2010 ◽

Vol 23 (4) ◽

pp. 471-482 ◽

Cited By ~ 6

Author(s):

Tongliang Shi ◽

Mei Lu

Keyword(s):

Interconnection Networks ◽

Fault Tolerant

Designing a New Class of Fault Tolerant Multistage Interconnection Networks

Journal of Interconnection Networks ◽

10.1142/s0219265905001472 ◽

2005 ◽

Vol 06 (04) ◽

pp. 361-382 ◽

Cited By ~ 4

Author(s):

K. V. Arya ◽

R. K. Ghosh

Keyword(s):

Fault Tolerance ◽

Interconnection Networks ◽

Fault Tolerant ◽

Interconnection Network ◽

Multistage Interconnection Networks ◽

Multistage Interconnection Network ◽

New Class

This paper proposes a technique to modify a Multistage Interconnection Network (MIN) to augment it with fault tolerant capabilities. The augmented MIN is referred to as Enhanced MIN (E-MIN). The technique employed for construction of E-MIN is compared with the two known physical fault tolerance techniques, namely, extra staging and chaining. EMINs are found to be more generic than extra staged networks and less expensive than chained networks. The EMIN realizes all the permutations realizable by the original MIN. The routing strategies under faulty and fault free conditions are shown to be very simple in the case of E-MINs.