Designing a New Class of Fault Tolerant Multistage Interconnection Networks

2005 ◽  
Vol 06 (04) ◽  
pp. 361-382 ◽  
Author(s):  
K. V. Arya ◽  
R. K. Ghosh

This paper proposes a technique to modify a Multistage Interconnection Network (MIN) to augment it with fault tolerant capabilities. The augmented MIN is referred to as Enhanced MIN (E-MIN). The technique employed for construction of E-MIN is compared with the two known physical fault tolerance techniques, namely, extra staging and chaining. EMINs are found to be more generic than extra staged networks and less expensive than chained networks. The EMIN realizes all the permutations realizable by the original MIN. The routing strategies under faulty and fault free conditions are shown to be very simple in the case of E-MINs.

2019 ◽  
Vol 30 (08) ◽  
pp. 1301-1315 ◽  
Author(s):  
Liqiong Xu ◽  
Shuming Zhou ◽  
Weihua Yang

An interconnection network is usually modeled as a graph, in which vertices and edges correspond to processors and communication links, respectively. Connectivity is an important metric for fault tolerance of interconnection networks. A graph [Formula: see text] is said to be maximally local-connected if each pair of vertices [Formula: see text] and [Formula: see text] are connected by [Formula: see text] vertex-disjoint paths. In this paper, we show that Cayley graphs generated by [Formula: see text]([Formula: see text]) transpositions are [Formula: see text]-fault-tolerant maximally local-connected and are also [Formula: see text]-fault-tolerant one-to-many maximally local-connected if their corresponding transposition generating graphs have a triangle, [Formula: see text]-fault-tolerant one-to-many maximally local-connected if their corresponding transposition generating graphs have no triangles. Furthermore, under the restricted condition that each vertex has at least two fault-free adjacent vertices, Cayley graphs generated by [Formula: see text]([Formula: see text]) transpositions are [Formula: see text]-fault-tolerant maximally local-connected if their corresponding transposition generating graphs have no triangles.


Author(s):  
Vipin Sharma ◽  
Abdul Q. Ansari ◽  
Rajesh Mishra

Purpose The purpose of this paper is to design a efficient layout of Multistage interconnection network which has cost effective solution with high reliability and fault-tolerence capability. For parallel computation, various multistage interconnection networks (MINs) have been discussed hitherto in the literature, however, these networks always required further improvement in reliability and fault-tolerance capability. The fault-tolerance capability of the network can be achieved by increasing the number of disjoint paths as a result the reliability of the interconnection networks is also improved. Design/methodology/approach This proposed design is a modification of gamma interconnection network (GIN) and three disjoint path gamma interconnection network (3-DGIN). It has a total seven number of paths for all tag values which is uniform out of these seven paths, three paths are disjoint paths which increase the fault tolerance capability by two faults. Due to the presence of more paths than the GIN and 3-DGIN, this proposed design is more reliable. Findings In this study, a new design layout of a MIN has been proposed which provides three disjoint paths and uniformity in terms of an equal number of paths for all source-destination (S-D) pairs. The new layout contains fewer nodes as compared to GIN and 3-DGIN. This design provides a symmetrical structure, low cost, better terminal reliability and provides an equal number of paths for all tag values (|S-D|) when compared with existing MINs of this class. Originality/value A new design layout of MINs has been purposed and its two terminal reliability is calculated with the help of the reliability block diagram technique.


Author(s):  
Amit Prakash ◽  
Dilip K. Yadav ◽  
Arvind Choubey

Background: Multistage interconnection networks are being used in computer and communications. Multiprocessor architectures for parallel computing exercise these interconnection networks for connecting various processing elements and transfer data between sub-systems of a digital system. The vast diversity of the field poses an obstacle to realize different kinds of interconnection networks and their relationship. Methods: This paper consists of an extensive survey of multistage interconnection networks. Results: A broad classification of multistage interconnection networks based on network functionality, reliability and fault tolerance is presented in order to emphasize the important principles which differentiate the network architectures. For each class of network, significant results are given and the basic design principles are explained. Conclusion: The various multistage interconnection networks design provide high performance, availability, throughput, lower latency, less power consumption along with improved fault-tolerance and reliability. However, there is a rising demand for new fault-tolerant and reliable multistage interconnection networks.


2020 ◽  
Vol 13 (3) ◽  
pp. 370-380
Author(s):  
Shilpa Gupta ◽  
Gobind Lal Pahuja

Background: VLSI technology advancements have resulted the requirements of high computational power, which can be achieved by implementing multiple processors in parallel. These multiple processors have to communicate with their memory modules by using Interconnection Networks (IN). Multistage Interconnection Networks (MIN) are used as IN, as they provide efficient computing with low cost. Objective: the objective of the study is to introduce new reliable MIN named as a (Shuffle Exchange Gamma Interconnection Network Minus) SEGIN-Minus, which provide reliability and faulttolerance with less number of stages. Methods: MUX at input terminal and DEMUX at output terminal of SEGIN has been employed with reduction in one intermidiate stage. Fault tolerance has been introduced in the form of disjoint paths formed between each source-destnation node pair. Hence reliability has been improved. Results: Terminal, Broadcast and Network Reliability has been evaluated by using Reliability Block Diagrams for each source-destination node pair. The results have been shown, which depicts the hiher reliability values for newly proposed network. The cost analysis shows that new SEGINMinus is a cheaper network than SEGIN. Conclusion: SEGIN-Minus has better reliability and Fault-tolerance than priviously proposed SEGIN.


2018 ◽  
Vol 29 (06) ◽  
pp. 995-1001 ◽  
Author(s):  
Shuli Zhao ◽  
Weihua Yang ◽  
Shurong Zhang ◽  
Liqiong Xu

Fault tolerance is an important issue in interconnection networks, and the traditional edge connectivity is an important measure to evaluate the robustness of an interconnection network. The component edge connectivity is a generalization of the traditional edge connectivity. The [Formula: see text]-component edge connectivity [Formula: see text] of a non-complete graph [Formula: see text] is the minimum number of edges whose deletion results in a graph with at least [Formula: see text] components. Let [Formula: see text] be an integer and [Formula: see text] be the decomposition of [Formula: see text] such that [Formula: see text] and [Formula: see text] for [Formula: see text]. In this note, we determine the [Formula: see text]-component edge connectivity of the hypercube [Formula: see text], [Formula: see text] for [Formula: see text]. Moreover, we classify the corresponding optimal solutions.


1998 ◽  
Vol 09 (01) ◽  
pp. 25-37 ◽  
Author(s):  
THOMAS J. CORTINA ◽  
ZHIWEI XU

We present a family of interconnection networks named the Cube-Of-Rings (COR) networks along with their basic graph-theoretic properties. Aspects of group graph theory are used to show the COR networks are symmetric and optimally fault tolerant. We present a closed-form expression of the diameter and optimal one-to-one routing algorithm for any member of the COR family. We also discuss the suitability of the COR networks as the interconnection network of scalable parallel computers.


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