Video compression/decompression is a term used to define a method for compressing or decompressing digital video. There are different video compression /decompression standards. H.264 which is also known as Advanced Video Coding is a paradigm, most commonly used these days. The objective of developing H.264 is to devise a standard which can impart good quality of video at a nether bit rates as compared to previous standards. To improve compression efficiency, H.264 encoders/decoders uses complex algorithms and modes which require more power. From studies we know that software-based implementations of these encoders/decoders on DSPs and CPUs suffer by few real time limitations. Hence hardware implementation of video encoders and decoders are necessary. Here in this paper Entropy decoding, Inverse Transform and Inverse Quantization blocks of H.264 Video decoder are designed using Verilog and simulated by Xilinx ISE Simulator
Design of CABAC Entropy Decoding, Inverse Quantization, Inverse Transform Blocks of H.264 Decoder using Verilog HDL
