Network processors for communication security: a review

2004 ◽  
Author(s):  
E. Khan ◽  
M.W. El-Kharashi ◽  
A.N.M. Ehtesham Rafiq ◽  
F. Gebali ◽  
M. Abd-El-Barr
Keyword(s):  
Communication Security ◽  
Network Processors

scholarly journals Efficient OFDM transceiver design for VLC sys-tems in fading channel

2018 ◽  
Vol 7 (1.8) ◽  
pp. 245
Author(s):  
Jayakumari J ◽  
Rakhi K J
Keyword(s):  
Fading Channels ◽  
Bit Error Rate ◽  
Fading Channel ◽  
Visible Light Communication ◽  
Communication Security ◽  
Rf Systems ◽  
High Data ◽  
Data Rates ◽  
Simulation Results ◽  
Rich Spectrum

With the widespread effective usage of LEDs the visible light communication (VLC) system has brought out an increasing interest in the field of wireless communication recently. VLC is envisioned to be an appealing substitute to RF systems because of the advantages of LEDs such as high communication security, rich spectrum, etc. For achieving bearable inter symbol interference (ISI) and high data rates, OFDM can be employed in VLC. In this paper, the performance of VLC system with popular unipolar versions of OFDM viz. Flip-OFDM and ACO-OFDM is analyzed in fading channels. From the simulation results it is seen that the Flip-OFDM-VLC system outperforms the ACO-OFDM-VLC system in terms of bit error rate and is well suited for future 5G applications.

A survey on IoT platforms: Communication, security, and privacy perspectives

2021 ◽  
pp. 108040
Author(s):  
Leonardo Babun ◽  
Kyle Denney ◽  
Z. Berkay Celik ◽  
Patrick McDaniel ◽  
A. Selcuk Uluagac
Keyword(s):  
Security And Privacy ◽  
Communication Security ◽  
Iot Platforms

Cooperative Mechanism of Local Memory and Cache in Network Processors

2013 ◽  
Vol 380-384 ◽  
pp. 1969-1972
Author(s):  
Bo Yuan ◽  
Jin Dou Fan ◽  
Bin Liu
Keyword(s):  
Packet Processing ◽  
Network Processors ◽  
Local Memory ◽  
Memory Space ◽  
Memory Mechanism ◽  
Hierarchical Memory ◽  
Packet Data ◽  
On Chip ◽  
Cache Mechanism ◽  
Cache Miss

Traditional network processors (NPs) adopt either local memory mechanism or cache mechanism as the hierarchical memory structure. The local memory mechanism usually has small on-chip memory space which is not fit for the various complicated applications. The cache mechanism is better at dealing with the temporary data which need to be read and written frequently. But in deep packet processing, cache miss occurs when reading each segment of packet. We propose a cooperative mechanism of local memory and cache. In which the packet data and temporary data are stored into local memory and cache respectively. The analysis and experimental evaluation shows that the cooperative mechanism can improve the performance of network processors and reduce processing latency with little extra resources cost.

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