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Top-down-based timing-driven steiner tree construction with wire sizing and buffer insertion
TENCON 2007 - 2007 IEEE Region 10 Conference
◽
10.1109/tencon.2007.4428902
◽
2007
◽
Cited By ~ 1
Author(s):
Jin-Tai Yan
◽
Shi-Qin Huang
◽
Zhi-Wei Chen
Keyword(s):
Steiner Tree
◽
Buffer Insertion
◽
Top Down
◽
Tree Construction
◽
Wire Sizing
Download Full-text
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Cited By
References
Timing-Driven Steiner Tree Construction with Wire Sizing, Buffer Insertion and Obstacle Avoidance
2007 14th IEEE International Conference on Electronics, Circuits and Systems
◽
10.1109/icecs.2007.4511092
◽
2007
◽
Cited By ~ 2
Author(s):
Jin-Tai Yan
◽
Shi-Qin Huang
◽
Zhi-Wei Chen
Keyword(s):
Obstacle Avoidance
◽
Steiner Tree
◽
Buffer Insertion
◽
Tree Construction
◽
Wire Sizing
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Performance-Driven Routing Tree Construction with Buffer Insertion, Wire Sizing under RLC Delay Model
2007 International Conference on Mechatronics and Automation
◽
10.1109/icma.2007.4304112
◽
2007
◽
Cited By ~ 1
Author(s):
Chang Qi
◽
Gao-feng Wang
◽
Yue-hua Chen
Keyword(s):
Delay Model
◽
Buffer Insertion
◽
Tree Construction
◽
Routing Tree
◽
Wire Sizing
Download Full-text
A new algorithm for routing tree construction with buffer insertion and wire sizing under obstacle constraints
IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281)
◽
10.1109/iccad.2001.968597
◽
2002
◽
Cited By ~ 13
Author(s):
Xiaoping Tang
◽
Ruiqi Tian
◽
Hua Xiang
◽
D.F. Wong
Keyword(s):
Buffer Insertion
◽
Tree Construction
◽
Routing Tree
◽
Wire Sizing
Download Full-text
Timing-driven Steiner tree construction with buffer insertion
48th Midwest Symposium on Circuits and Systems, 2005.
◽
10.1109/mwscas.2005.1594085
◽
2005
◽
Author(s):
Jin-Tai Yan
◽
Tzu-Ya Wang
◽
Chia-Fang Lee
Keyword(s):
Steiner Tree
◽
Buffer Insertion
◽
Tree Construction
Download Full-text
An efficient routing tree construction algorithm with buffer insertion, wire sizing and obstacle considerations
ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)
◽
10.1109/aspdac.2004.1337600
◽
2004
◽
Cited By ~ 4
Author(s):
S. Dechu
◽
Z.C. Shen
◽
C.C.N. Chu
Keyword(s):
Buffer Insertion
◽
Construction Algorithm
◽
Tree Construction
◽
Routing Tree
◽
Wire Sizing
Download Full-text
Zero-skew clock tree construction by simultaneous routing, wire sizing and buffer insertion
Proceedings of the 2000 international symposium on Physical design - ISPD '00
◽
10.1145/332357.332370
◽
2000
◽
Cited By ~ 40
Author(s):
I-Min Liu
◽
Tan-Li Chou
◽
Adnan Aziz
◽
D. F. Wong
Keyword(s):
Buffer Insertion
◽
Clock Tree
◽
Tree Construction
◽
Wire Sizing
◽
Zero Skew
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Buffered Steiner tree construction with wire sizing for interconnect layout optimization
Proceedings of International Conference on Computer Aided Design
◽
10.1109/iccad.1996.568938
◽
2002
◽
Cited By ~ 73
Author(s):
T. Okamoto
◽
J. Cong
Keyword(s):
Steiner Tree
◽
Layout Optimization
◽
Tree Construction
◽
Wire Sizing
Download Full-text
Performance-driven routing tree construction with buffer insertion and wire sizing
Journal of Shanghai Jiaotong University (Science)
◽
10.1007/s12204-008-0046-3
◽
2008
◽
Vol 13
(1)
◽
pp. 46-51
Author(s):
Chang Qi
◽
Gao-feng Wang
Keyword(s):
Buffer Insertion
◽
Tree Construction
◽
Routing Tree
◽
Wire Sizing
Download Full-text
An efficient routing tree construction algorithm with buffer insertion, wire sizing, and obstacle considerations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
◽
10.1109/tcad.2005.844107
◽
2005
◽
Vol 24
(4)
◽
pp. 600-608
◽
Cited By ~ 7
Author(s):
S. Dechu
◽
C. Shen
◽
C. Chu
Keyword(s):
Buffer Insertion
◽
Construction Algorithm
◽
Tree Construction
◽
Routing Tree
◽
Wire Sizing
Download Full-text
An efficient routing tree construction algorithm with buffer insertion, wire sizing and obstacle considerations
10.31274/rtd-20200803-161
◽
2003
◽
Author(s):
Sampath Dechu
Keyword(s):
Buffer Insertion
◽
Construction Algorithm
◽
Tree Construction
◽
Routing Tree
◽
Wire Sizing
Download Full-text
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