Shield: A Reliable Network-on-Chip Router Architecture for Chip Multiprocessors

2016 ◽  
Vol 27 (10) ◽  
pp. 3058-3070 ◽  
Author(s):  
Pavan Poluri ◽  
Ahmed Louri
Keyword(s):  
Chip Multiprocessors ◽  
Network On Chip ◽  
Router Architecture ◽  
On Chip

Pre-allocated Path Based Low Latency Router Architecture for Network-on-chip

2014 ◽  
Vol 35 (2) ◽  
pp. 341-346
Author(s):  
Xiao-fu Zheng ◽  
Hua-xi Gu ◽  
Yin-tang Yang ◽  
Zhong-fan Huang
Keyword(s):  
Network On Chip ◽  
Low Latency ◽  
Router Architecture ◽  
On Chip

Designing fault-tolerant network-on-chip router architecture

2010 ◽  
Vol 97 (10) ◽  
pp. 1181-1192 ◽  
Author(s):  
Ashkan Eghbal ◽  
Pooria M. Yaghini ◽  
H. Pedram ◽  
H. R. Zarandi
Keyword(s):  
Fault Tolerant ◽  
Network On Chip ◽  
Router Architecture ◽  
On Chip

scholarly journals Static and dynamic task mapping onto network on chip multiprocessors

DYNA ◽  
2014 ◽  
Vol 81 (185) ◽  
pp. 28 ◽  
Author(s):  
Freddy Bolaños-Martínez ◽  
Jose Edison Aedo ◽  
Fredy Rivera-Vélez
Keyword(s):  
Chip Multiprocessors ◽  
Network On Chip ◽  
Task Mapping ◽  
Dynamic Task ◽  
On Chip

scholarly journals Flexible router architecture for network-on-chip

2012 ◽  
Vol 64 (5) ◽  
pp. 1301-1310 ◽  
Author(s):  
Mostafa S. Sayed ◽  
Ahmed Shalaby ◽  
Mohamed El-Sayed ◽  
Victor Goulart
Keyword(s):  
Network On Chip ◽  
Router Architecture ◽  
On Chip
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