A high-level synthesis approach to design of fault-tolerant systems

Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125) ◽

10.1109/vtest.1997.600305 ◽

2002 ◽

Author(s):

G. Buonanno ◽

M. Pugassi ◽

M.G. Sami

Keyword(s):

Fault Tolerant ◽

High Level Synthesis ◽

Fault Tolerant Systems ◽

Synthesis Approach

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A High-Level Synthesis Approach Optimizing Accumulations in Floating-Point Programs Using Custom Formats and Operators

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.41 ◽

2017 ◽

Author(s):

Yohann Uguen ◽

Florent de Dinechin ◽

Steven Derrien

Keyword(s):

High Level Synthesis ◽

Floating Point ◽

Synthesis Approach

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Building Trustworthy Systems Using Untrusted Components: A High-Level Synthesis Approach

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2016.2530092 ◽

2016 ◽

Vol 24 (9) ◽

pp. 2946-2959 ◽

Author(s):

Jeyavijayan JV Rajendran ◽

Ozgur Sinanoglu ◽

Ramesh Karri

Keyword(s):

High Level Synthesis ◽

Synthesis Approach

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A Novel High Level Synthesis Approach

2007 10th IEEE International Conference on Computer-Aided Design and Computer Graphics ◽

10.1109/cadcg.2007.4407953 ◽

2007 ◽

Author(s):

Haijun Li ◽

Yanhong Jia ◽

Tao Zhou ◽

Huiling Lu

Keyword(s):

High Level Synthesis ◽

Synthesis Approach

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A method for the construction and interpretation of high level models for distributed fault-tolerant systems

Proceedings 14th Symposium on Reliable Distributed Systems RELDIS-95 ◽

10.1109/reldis.1995.526215 ◽

2002 ◽

Author(s):

K. Tilly ◽

I. Kiss ◽

G. Roman ◽

T. Dobrowiecki ◽

A.R. Varkonyi-Koczy

Keyword(s):

Fault Tolerant ◽

Fault Tolerant Systems ◽

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Bloom filter acceleration: A high level synthesis approach

2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE) ◽

10.1109/ccece.2017.7946725 ◽

2017 ◽

Author(s):

Reem Khairy ◽

Mona Safar ◽

M. Watheq El-Kharashi

Keyword(s):

Bloom Filter ◽

High Level Synthesis ◽

Synthesis Approach

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An effective high-level synthesis approach for dynamically reconfigurable systems

Proceedings Fourth International Conference/Exhibition on High Performance Computing in the Asia-Pacific Region ◽

10.1109/hpc.2000.846575 ◽

2000 ◽

Author(s):

Xue-Jie Zhang ◽

Kam-Wing Ng

Keyword(s):

High Level Synthesis ◽

Reconfigurable Systems ◽

Dynamically Reconfigurable ◽

Synthesis Approach

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A formal high level synthesis approach for DSP architectures

10.1109/icassp.1990.115989 ◽

2002 ◽

Author(s):

K.M. Elleithy ◽

M.A. Bayoumi

Keyword(s):

High Level Synthesis ◽

Synthesis Approach

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Correction to: VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach

Circuits Systems and Signal Processing ◽

10.1007/s00034-018-0979-1 ◽

2018 ◽

Vol 37 (12) ◽

pp. 5690-5690 ◽

Author(s):

Subhajit Das ◽

Sudip Ghosh ◽

Nachiketa Das ◽

Santi P. Maity ◽

Hafizur Rahaman ◽

...

Keyword(s):

Image Watermarking ◽

High Level Synthesis ◽

Pipeline Architecture ◽

Difference Expansion ◽

Reversible Image Watermarking ◽

Synthesis Approach

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A High-Level Synthesis Approach to the Software/Hardware Codesign of NTT-Based Post-Quantum Cryptography Algorithms

2019 International Conference on Field-Programmable Technology (ICFPT) ◽

10.1109/icfpt47387.2019.00070 ◽

2019 ◽

Author(s):

Duc Tri Nguyen ◽

Viet B. Dang ◽

Kris Gaj

Keyword(s):

Quantum Cryptography ◽

High Level Synthesis ◽

Post Quantum Cryptography ◽

Synthesis Approach

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A scheduling and binding heuristic for high-level synthesis of fault-tolerant FPGA applications

2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP) ◽

10.1109/asap.2015.7245735 ◽

2015 ◽

Author(s):

Aniruddha Shastri ◽

Greg Stitt ◽

Eduardo Riccio

Keyword(s):

Fault Tolerant ◽

High Level Synthesis ◽

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