Soft error resilient QR factorization for hybrid system with GPGPU

Proceedings of the second workshop on Scalable algorithms for large-scale systems - ScalA '11 ◽

10.1145/2133173.2133179 ◽

2011 ◽

Author(s):

Peng Du ◽

Piotr Luszczek ◽

Stan Tomov ◽

Jack Dongarra

Keyword(s):

Hybrid System ◽

Qr Factorization ◽

Error Resilient

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Soft error resilient QR factorization for hybrid system with GPGPU

Journal of Computational Science ◽

10.1016/j.jocs.2013.01.004 ◽

2013 ◽

Vol 4 (6) ◽

pp. 457-464 ◽

Author(s):

Peng Du ◽

Piotr Luszczek ◽

Stan Tomov ◽

Jack Dongarra

Keyword(s):

Hybrid System ◽

Qr Factorization ◽

Error Resilient

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Selective-set-invalidation (SSI) for soft-error-resilient cache architecture

ACM SIGARCH Computer Architecture News ◽

10.1145/333680.333685 ◽

1999 ◽

Vol 27 (3) ◽

pp. 4-9

Author(s):

Seung H. Hwang ◽

Gwan S. Choi

Keyword(s):

Error Resilient ◽

Cache Architecture

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An energy-aware fault tolerant scheduling framework for soft error resilient cloud computing systems

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014 ◽

10.7873/date2014.107 ◽

2014 ◽

Author(s):

Yue Gao ◽

Sandeep K. Gupta ◽

Yanzhi Wang ◽

Massoud Pedram

Keyword(s):

Cloud Computing ◽

Fault Tolerant ◽

Energy Aware ◽

Computing Systems ◽

Error Resilient

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SERAD: Soft Error Resilient Asynchronous Design Using a Bundled Data Protocol

IEEE Transactions on Circuits and Systems I Regular Papers ◽

10.1109/tcsi.2020.2965073 ◽

2020 ◽

Vol 67 (5) ◽

pp. 1667-1677 ◽

Author(s):

Sai Aparna Aketi ◽

Smriti Gupta ◽

Huimei Cheng ◽

Joycee Mekie ◽

Peter A. Beerel

Keyword(s):

Asynchronous Design ◽

Error Resilient

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Soft Error Resilient System Design through Error Correction

2006 IFIP International Conference on Very Large Scale Integration ◽

10.1109/vlsisoc.2006.313256 ◽

2006 ◽

Author(s):

Subhasish Mitra ◽

Ming Zhang ◽

Norbert Seifert ◽

Tm Mak ◽

Kee Kim

Keyword(s):

System Design ◽

Error Correction ◽

Error Resilient

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Design for a Soft Error Resilient Dynamic Task-Based Runtime

2015 IEEE International Parallel and Distributed Processing Symposium ◽

10.1109/ipdps.2015.81 ◽

2015 ◽

Author(s):

Chongxiao Cao ◽

Thomas Herault ◽

George Bosilca ◽

Jack Dongarra

Keyword(s):

Error Resilient ◽

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SERL: Soft error resilient latch design

2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) ◽

10.1109/vlsi-dat.2016.7482555 ◽

2016 ◽

Author(s):

Chun-Wei Jacky Chang ◽

Hsuan-Ming Ryan Huang ◽

Yuwen Lin ◽

Charles H.-P. Wen

Keyword(s):

Error Resilient

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A Method to Detect Bit Flips in a Soft-Error Resilient TCAM

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2017.2748019 ◽

2018 ◽

Vol 37 (6) ◽

pp. 1185-1196 ◽

Author(s):

Infall Syafalni ◽

Tsutomu Sasao ◽

Xiaoqing Wen

Keyword(s):

Error Resilient

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Soft error resilient VLSI architecture for signal processing

2009 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS) ◽

10.1109/ispacs.2009.5383872 ◽

2009 ◽

Author(s):

Dawood Alnajjar ◽

Younghun Ko ◽

Takashi Imagawa ◽

Masayuki Hiromoto ◽

Yukio Mitsuyama ◽

...

Keyword(s):

Signal Processing ◽

Vlsi Architecture ◽

Error Resilient

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ER-TCAM: A Soft-Error-Resilient SRAM-Based Ternary Content-Addressable Memory for FPGAs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2020.2968365 ◽

2020 ◽

Vol 28 (4) ◽

pp. 1084-1088

Author(s):

Inayat Ullah ◽

Joon-Sung Yang ◽

Jaeyong Chung

Keyword(s):

Error Resilient ◽

Content Addressable Memory ◽

Ternary Content Addressable Memory

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