Power efficient design of real-time embedded systems based on programmable processors
becomes more important as system functionality is increasingly realized through
software. We address a power optimization method for real-time embedded applications
on a variable speed processor. The method combines off-line and on-line components.
The off-line component determines the lowest possible maximum processor speed while
guaranteeing deadlines of all tasks. The on-line component dynamically varies the processor
speed or bring a processor into a power-down mode to exploit execution time
variations and idle intervals. Experimental results show that the proposed method
obtains a significant power reduction across several kinds of applications.
Constructing Test Suites for Real-Time Embedded Systems Under Input Timing Constraints