Mathematical Programming Models for Fresh Fruit Supply Chain Optimization: A Review of the Literature and Emerging Trends

The fresh fruit agricultural and distribution sector is faced with risks and uncertainties from climate change, water scarcity, land-use increase for industrial and urban development, consumer behavior, and price volatility. The planning framework for production and distribution is highly complex as a result. Mathematical models have been developed over the decades to deal with this complexity. With improvements in both processor speed and memory, these models are becoming increasingly sophisticated. This review focuses on the recent progress in mathematically based decision making to account for uncertainties in the fresh fruit supply chain. The models in the literature are mostly based on linear and mixed integer programming and involve variants such as stochastic programming and robust optimization. The functional areas of application include planting, harvest optimization, logistics and distribution. The perishability of the fresh fruit supply chain is an important issue as is the cycle time of cultivation and harvest.

Effects of Combining Multi-Core Processors in Creating Super-Computers Using Raspberry Pis

The vast resources of old working computers are getting bigger and bigger. Companies that consider these old computers as obsolete but still working put these computers to the storage, or worse, junk. Different entities are more and more relying on supercomputers to replace their ordinary and old computers. Supercomputers have become a basic necessity in this generation. It has a wide variety of functions that make our daily work easier. Having a well-built supercomputer with excellent specifications is a must; however, it comes with a cost. The computers can be clustered to create a supercomputer. The computers used in these clustered supercomputers have the exact specifications, such as uniform models with the same number of cores per processor and the same memory capacity. This study focuses on creating a supercomputer using different processors with a different number of cores per processor, processor speed, and different memory capacity. This study can be a valuable system for entities that have old computers in their workplace. They can reuse their old computers and combine them with other computers to create a supercomputer, thus reducing waste and recycling old resources. This study will be using different types of Raspberry Pi (RPi) computers combining old and new models to simulate the scenario of combining multi-core processors in creating supercomputers.

FPGA configuration of an alloyed correlated branch predictor used with RISC processor for educational purposes

Instructions pipelining is one of the most outstanding techniques used in improving processor speed; nonetheless, these pipelined stages are constantly facing stalls that caused by nested conditional branches. During the execution of nested conditional branches, the behavior of the running branch depends on the history information of the previous ones; therefore, these branches have the greatest effect in reducing the prediction accuracy of a branch predictor among conditional branches. The purpose of this research is to reduce the stall cycles caused by correlated branches misprediction by introducing a hardware model of a branch predictor that combines both local and global prediction techniques. This predictor integrates the prediction characteristics of the alloyed predictor with those of the correlated predictor. the predictor design which implemented in VHDL (Very high-speed IC hardware description language) was inserted in previously designed MIPS (microprocessor without interlocked pipelined stages) processor and its prediction accuracy was confirmed by executing a program using the selection sort algorithm to sort 100 input numbers of different combinations ascendingly.

Optimal Wirelength of Balanced Complete Multipartite Graphs onto Cartesian Product of {Path, Cycle} and Trees

In any interconnection network, task allocation plays a major role in the processor speed as fair distribution leads to enhanced performance. Complete multipartite networks serve well for this purpose as the task can be split into different partites which improves the degree of reliability of the network. Such an allocation process in the network can be done by means of graph embedding. The optimal wirelength of a graph embedding helps in the distribution of deterministic algorithms from the guest graph to other host graphs in order to incorporate its unique deterministic properties on that chosen graph. In this paper, we propose an algorithm to compute the optimal wirelength of balanced complete multipartite graphs onto the Cartesian product of trees with path and cycle. Moreover, we derive the closed formulae for wirelengths in specific trees like (1-rooted) complete binary tree and sibling graphs.

Automated Malware Detection in Mobile App Stores Based on Robust Feature Generation

Many Internet of Things (IoT) services are currently tracked and regulated via mobile devices, making them vulnerable to privacy attacks and exploitation by various malicious applications. Current solutions are unable to keep pace with the rapid growth of malware and are limited by low detection accuracy, long discovery time, complex implementation, and high computational costs associated with the processor speed, power, and memory. Therefore, an automated intelligence technique is necessary for detecting apps containing malware and effectively predicting cyberattacks in mobile marketplaces. In this study, a system for classifying mobile marketplaces applications using real-world datasets is proposed, which analyzes the source code to identify malicious apps. A rich feature set of application programming interface (API) calls is proposed to capture the regularities in apps containing malicious content. Two feature-selection methods—Chi-Square and ANOVA—were examined in conjunction with ten supervised machine-learning algorithms. The detection accuracy of each classifier was evaluated to identify the most reliable classifier for malware detection using various feature sets. Chi-Square was found to have a higher detection accuracy as compared to ANOVA. The proposed system achieved a detection accuracy of 98.1% with a classification time of 1.22 s. Furthermore, the proposed system required a reduced number of API calls (500 instead of 9000) to be incorporated as features.

Design of Deep Learning VLIW Processor for Image Recognition

In order to adapt the application demands of high resolution images recognition and efficient processing of localization in aviation and aerospace fields, and to solve the problem of insufficient parallelism in existing researches, an extensible multiprocessor cluster deep learning processor architecture based on VLIW is designed by optimizing the computation of each layer of deep convolutional neural network model. Parallel processing of feature maps and neurons, instruction level parallelism based on very long instruction word (VLIW), data level parallelism of multiprocessor clusters and pipeline technologies are adopted in the design. The test results based on FPGA prototype system show that the processor can effectively complete the image classification and object detection applications. The peak performance of processor is up to 128 GOP/s when it operates at 200 MHz. For selecting benchmarks, the processor speed is about 12X faster than CPU and 7X faster than GPU at least. Comparing with the results of the software framework, the average error of the test accuracy of the processor is less than 1%.

Energy Consumption Optimization by Increasing The Processor Speed of Moving Communication Devices in Transport Layer Protocol

The energy efficiency of mobile devices becomes very important, considering the development of mobile device technology starting to lead to smaller dimensions and with the higher processor speed of these mobile devices. Various studies have been conducted to grow energy-aware in hardware, middleware and application software. The step of optimizing energy consumption can be done at various layers of mobile communication network architecture. This study focuses on examining the energy consumption of mobile devices in the transport layer protocol, where the processor speed of the mobile devices used in this experiment is higher than the processor speed used in similar studies. The mobile device processor in this study has a speed of 1.5 GHz with 1 GHz RAM capacity. While in similar studies that have been carried out, mobile device processors have a speed of 369 MHz with a RAM capacity of less than 0.5 GHz. This study conducted an experiment in transmitting mobile data using TCP and UDP protocols. Because the video requires intensive delivery, so the video is the traffic that is being reviewed. Energy consumption is measured based on the amount of energy per transmission and the amount of energy per package. To complete the analysis, it can be seen the strengths and weaknesses of each protocol in the transport layer protocol, in this case the TCP and UDP protocols, also evaluated the network performance parameters such as delay and packet loss. The results showed that the UDP protocol consumes less energy and transmission delay compared to the TCP protocol. However, only about 22% of data packages can be transmitted. Therefore, the UDP protocol is only effective if the bit rate of data transmitted is close to the network speed. Conversely, despite consuming more energy and delay, the TCP protocol is able to transmit nearly 96% of data packets. On the other hand, when compared to mobile devices that have lower processor speeds, the mobile devices in this study consume more energy to transmit video data. However, transmission delay and packet loss can be suppressed. Thus, mobile devices that have higher processor speeds are able to optimize the energy consumed to improve transmission quality.Key words: energy consumption, processor, delay, packet loss, transport layer protocol