This paper explores the new approaches for trace-based and In-system debugging of high level synthesis-generated hardware. The presented approach also exhibits the use of the Event Observability Ports (EOP) which provides the source level event observability in the hardware. To trace the events, the use of the independent trace buffers also known as Event Observability Buffers (EOB) is also discussed. The EOB has the signal that specifies the enabling the data storage and allows the storage decisions cycle-by-cycle which are to be made on the basis of EOB-by-EOB. The proposed approach also reveals the timing relationships of the captured events in the trace buffers. To recover the lost relationships among these events, we have introduced two methods in this paper. We also presented the demonstration and effectiveness of the trace strategy of an EOB.
The Effect of Compiler Optimizations on High-Level Synthesis for FPGAs