A high-performance matrix-multiplication algorithm on a distributed-memory parallel computer, using overlapped communication

1994 ◽  
Vol 38 (6) ◽  
pp. 673-681 ◽  
Author(s):  
R. C. Agarwal ◽  
F. G. Gustavson ◽  
M. Zubair
Keyword(s):  
High Performance ◽  
Distributed Memory ◽  
Matrix Multiplication ◽  
Parallel Computer ◽  
Matrix Multiplication Algorithm ◽  
Multiplication Algorithm ◽  
Performance Matrix

A high performance matrix multiplication algorithm for MPPs

1996 ◽  
pp. 1-8 ◽  
Author(s):  
Ramesh C. Agarwal ◽  
Fred G. Gustavson ◽  
Susanne M. Balle ◽  
Mahesh Joshi ◽  
Prasad Palkar
Keyword(s):  
High Performance ◽  
Matrix Multiplication ◽  
Matrix Multiplication Algorithm ◽  
Multiplication Algorithm ◽  
Performance Matrix

scholarly journals A Tensor Product Formulation of Strassen's Matrix Multiplication Algorithm with Memory Reduction

1995 ◽  
Vol 4 (4) ◽  
pp. 275-289 ◽  
Author(s):  
B. Kumar ◽  
C.-H. Huang ◽  
P. Sadayappan ◽  
R.W. Johnson
Keyword(s):  
Tensor Product ◽  
Shared Memory ◽  
High Performance ◽  
Fourier Transforms ◽  
Matrix Multiplication ◽  
Matrix Multiplication Algorithm ◽  
Multiplication Algorithm ◽  
Strassen’S Algorithm ◽  
Strassen's Algorithm ◽  
Product Formulas

In this article, we present a program generation strategy of Strassen's matrix multiplication algorithm using a programming methodology based on tensor product formulas. In this methodology, block recursive programs such as the fast Fourier Transforms and Strassen's matrix multiplication algorithm are expressed as algebraic formulas involving tensor products and other matrix operations. Such formulas can be systematically translated to high-performance parallel/vector codes for various architectures. In this article, we present a nonrecursive implementation of Strassen's algorithm for shared memory vector processors such as the Cray Y-MP. A previous implementation of Strassen's algorithm synthesized from tensor product formulas required working storage of size O(7n) for multiplying 2n× 2nmatrices. We present a modified formulation in which the working storage requirement is reduced to O(4n). The modified formulation exhibits sufficient parallelism for efficient implementation on a shared memory multiprocessor. Performance results on a Cray Y-MP8/64 are presented.

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