Retargetable Very Long Instruction Word Compiler Framework for Digital Signal Processors Subramanian Rajagopalan and Sharad Malik

The Compiler Design Handbook ◽

10.1201/9781420040579-20 ◽

2002 ◽

pp. 615-642

Keyword(s):

Digital Signal ◽

Digital Signal Processors ◽

Very Long Instruction Word ◽

Compiler Framework ◽

Signal Processors

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A Retargetable Very Long Instruction Word Compiler Framework for Digital Signal Processors

The Compiler Design Handbook ◽

10.1201/9781420043839.ch18 ◽

2007 ◽

pp. 18-1-18-28

Author(s):

Subramanian Rajagopalan ◽

Sharad Malik

Keyword(s):

Digital Signal ◽

Digital Signal Processors ◽

Very Long Instruction Word ◽

Compiler Framework ◽

Signal Processors

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Instruction-level programming approach for very long instruction word digital signal processors

2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS) ◽

10.1109/icecs.2017.8292060 ◽

2017 ◽

Author(s):

Tomas Fryza ◽

Roman Mego

Keyword(s):

Digital Signal ◽

Digital Signal Processors ◽

Programming Approach ◽

Very Long Instruction Word ◽

Signal Processors

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Retargetable Very Long InstructionWord Compiler Framework for Digital Signal Processors

The Compiler Design Handbook ◽

10.1201/9781420040579.ch16 ◽

2002 ◽

Author(s):

Subramanian Rajagopalan ◽

Sharad Malik

Keyword(s):

Digital Signal ◽

Digital Signal Processors ◽

Compiler Framework ◽

Signal Processors

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Implementation Using Digital Signal Processors

Digital Signal Processing 101 ◽

10.1016/b978-1-85617-921-8.00024-9 ◽

2010 ◽

pp. 233-241

Author(s):

Michael Parker

Keyword(s):

Digital Signal ◽

Digital Signal Processors ◽

Signal Processors

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Hardware Acceleration Implementation of Three-Dimensional Convolutional Neural Network on Vector Digital Signal Processors

2020 4th International Conference on Robotics and Automation Sciences (ICRAS) ◽

10.1109/icras49812.2020.9135062 ◽

2020 ◽

Author(s):

Weiwen Chen ◽

Yaohua Wang ◽

Chao Yang ◽

Yong Li

Keyword(s):

Neural Network ◽

Convolutional Neural Network ◽

Three Dimensional ◽

Hardware Acceleration ◽

Digital Signal ◽

Digital Signal Processors ◽

Signal Processors

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A formal approach to pipeline optimization in synthesis of digital signal processors with fine grain parallelism

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 ◽

10.1109/iscas.1994.408970 ◽

2002 ◽

Author(s):

S. Zimmermann ◽

E. Lueder

Keyword(s):

Digital Signal ◽

Digital Signal Processors ◽

Formal Approach ◽

Signal Processors

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Modulo-addressing utilization in automatic software synthesis for digital signal processors

1997 IEEE International Conference on Acoustics, Speech, and Signal Processing ◽

10.1109/icassp.1997.599861 ◽

2002 ◽

Author(s):

M. Willems ◽

H. Keding ◽

V. Zivojnovic ◽

H. Meyr

Keyword(s):

Digital Signal ◽

Digital Signal Processors ◽

Software Synthesis ◽

Automatic Software ◽

Signal Processors

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Implementation of an instruction dispatch unit applied to digital signal processors with VLIW architecture

2010 Second Pacific-Asia Conference on Circuits, Communications and System ◽

10.1109/paccs.2010.5626806 ◽

2010 ◽

Author(s):

Qingwei Zheng ◽

Zhaolin Li ◽

Jianfei Ye ◽

Chipin Wei ◽

Jiajia Chen

Keyword(s):

Digital Signal ◽

Digital Signal Processors ◽

Signal Processors

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A cryptosystem using digital signal processors for mobile communication

10.1109/icc.1989.49862 ◽

2003 ◽

Author(s):

M. Tatebayashi ◽

N. Matsuzaki ◽

D.B. Newman

Keyword(s):

Mobile Communication ◽

Digital Signal ◽

Digital Signal Processors ◽

Signal Processors

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The application of high-level languages to single-chip digital signal processors

10.1109/icassp.1988.196938 ◽

2003 ◽

Author(s):

R. Simar ◽

A. Davis

Keyword(s):

Digital Signal ◽

Digital Signal Processors ◽

Single Chip ◽

Signal Processors

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