An enhanced model for reliable deflection routing in mesh network on chip

Author(s):  
Simi Zerine Sleeba ◽  
M.G. Mini
2012 ◽  
Vol 9 (7) ◽  
pp. 706-711
Author(s):  
Xiaoshan Yu ◽  
Huaxi Gu ◽  
Yingtang Yang ◽  
Luying Bai ◽  
Hua You

2019 ◽  
Vol 75 (10) ◽  
pp. 6855-6881 ◽  
Author(s):  
Anugrah Jain ◽  
Vijay Laxmi ◽  
Meenakshi Tripathi ◽  
Manoj Singh Gaur ◽  
Rimpy Bishnoi

2016 ◽  
Vol 26 (03) ◽  
pp. 1750037 ◽  
Author(s):  
Xiaofeng Zhou ◽  
Lu Liu ◽  
Zhangming Zhu

Network-on-Chip (NoC) has become a promising design methodology for the modern on-chip communication infrastructure of many-core system. To guarantee the reliability of traffic, effective fault-tolerant scheme is critical to NoC systems. In this paper, we propose a fault-tolerant deflection routing (FTDR) to address faults on links and router by redundancy technique. The proposed FTDR employs backup links and a redundant fault-tolerant unit (FTU) at router-level to sustain the traffic reliability of NoC. Experimental results show that the proposed FTDR yields an improvement of routing performance and fault-tolerant capability over the reported fault-tolerant routing schemes in average flit deflection rate, average packet latency, saturation throughput and reliability by up to 13.5%, 9.8%, 10.6% and 17.5%, respectively. The layout area and power consumption are increased merely 3.5% and 2.6%.


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