scholarly journals Model Checking Approach for Deadlock Detection in an Operating System Process-Resource Graph Using Dynamic Model Generating and Computation Tree Logic Specification

10.29007/fmrb ◽  
2019 ◽  
Author(s):  
Thitivatr Patanasakpinyo

Deadlock between processes and resources is a serious problem in development of operating system. Multiple methods were invented to deal with deadlock issue. Deadlock detection is one method that allows a deadlock to take place then detects thereafter which processes and resources have caused it. In traditional process-resource graph, we propose an approach to detect a deadlock by implementing model checking technique and Computation Tree Logic (CTL) specification. In this paper, we modified traditional process-resource graph such that the outcome graph satisfied valid model of Kripke structure, which over- came limitations of traditional representation of process-resource graph and still preserved every proposition, correctness, and property of the system. With the modified graph, we designed a CTL specification that verified whether or not there existed a deadlock caused by one or more pairs of process and resource. A Java application was developed to implement the proposed approach such that it was capable of dynamically generating a valid model for any process-resource graph input, dynamically generating CTL formula for specification, and verifying the model with corresponding CTL formula.


2012 ◽  
Vol 23 (7) ◽  
pp. 1656-1668 ◽  
Author(s):  
Cong-Hua ZHOU ◽  
Zhi-Feng LIU ◽  
Chang-Da WANG




10.29007/c8jt ◽  
2018 ◽  
Author(s):  
Franz Weitl ◽  
Shin Nakajima

A new algorithm for incrementally generating counterexamples for the temporal description logic ALCCTL is presented. ALCCTL is a decidable combination of the description logic ALC and computation tree logic CTL that is expressive for content- and structure-related properties of web documents being verified by model checking. In the case of a specification violation, existing model checkers provide a single counterexample which may be large and complex. We extend existing algorithms for generating counterexamples in two ways. First, a coarse counterexample is generated initially that can be refined subsequently to the desired level of detail in an incremental manner. Second, the user can choose where and in which way a counterexample is refined. This enables the interactive step-by-step analysis of error scenarios according to the user's interest.We demonstrate in a case study on a web-based training document that the proposed approach reveals more errors and explains the cause of errors more precisely than the counterexamples of existing model checkers. In addition, we demonstrate that the proposed algorithm is sufficiently fast to enable smooth interaction even in the case of large documents.



Author(s):  
Yingjie Han ◽  
Qinglei Zhou ◽  
Linfeng Jiao ◽  
Kai Nie ◽  
Chunyan Zhang ◽  
...  


2018 ◽  
Vol 52 (4) ◽  
pp. 539-563 ◽  
Author(s):  
Norihiro Kamide

Purpose The purpose of this paper is to develop new simple logics and translations for hierarchical model checking. Hierarchical model checking is a model-checking paradigm that can appropriately verify systems with hierarchical information and structures. Design/methodology/approach In this study, logics and translations for hierarchical model checking are developed based on linear-time temporal logic (LTL), computation-tree logic (CTL) and full computation-tree logic (CTL*). A sequential linear-time temporal logic (sLTL), a sequential computation-tree logic (sCTL), and a sequential full computation-tree logic (sCTL*), which can suitably represent hierarchical information and structures, are developed by extending LTL, CTL and CTL*, respectively. Translations from sLTL, sCTL and sCTL* into LTL, CTL and CTL*, respectively, are defined, and theorems for embedding sLTL, sCTL and sCTL* into LTL, CTL and CTL*, respectively, are proved using these translations. Findings These embedding theorems allow us to reuse the standard LTL-, CTL-, and CTL*-based model-checking algorithms to verify hierarchical systems that are modeled and specified by sLTL, sCTL and sCTL*. Originality/value The new logics sLTL, sCTL and sCTL* and their translations are developed, and some illustrative examples of hierarchical model checking are presented based on these logics and translations.



Author(s):  
Hiromi Hiraishi ◽  
Shintaro Meki ◽  
Kiyoharu Hamaguchi


2015 ◽  
Vol 262 ◽  
pp. 44-59 ◽  
Author(s):  
Yongming Li ◽  
Yali Li ◽  
Zhanyou Ma


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