2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05)
Latest Publications

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Published By IEEE

0769524567

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Quartz: A Framework for Correct and Efficient Reconfigurable Design

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) ◽

10.1109/reconfig.2005.32 ◽

2006 ◽

Cited By ~ 3

Author(s):

O. Pell ◽

W. Luk

Keyword(s):

Reconfigurable Design

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FPGA Implementation of a Synchronous and Self-Timed Neuroprocessor

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) ◽

10.1109/reconfig.2005.17 ◽

2006 ◽

Cited By ~ 2

Author(s):

J.J. Raygoza-Panduro ◽

S. Ortega-Cisneros ◽

E. Boemo

Keyword(s):

Fpga Implementation

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Hierarchical FPGA Clustering Based on a Multilevel Partitioning Approach to Improve Routability and Reduce Power Dissapation

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) ◽

10.1109/reconfig.2005.23 ◽

2006 ◽

Cited By ~ 9

Author(s):

Z. Marrakchi ◽

H. Mrabet ◽

H. Mehrez

Keyword(s):

Hierarchical Fpga

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An FPGA Arithmetic Logic Unite for Computing Scalar Multiplication Using the Half-and-Add Method

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) ◽

10.1109/reconfig.2005.8 ◽

2006 ◽

Cited By ~ 1

Author(s):

S. Mercurio Hernandez Rodriguez ◽

F. Rodriguez-Henriquez

Keyword(s):

Scalar Multiplication

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FPGA Implementation of DSVPWM Modulator

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) ◽

10.1109/reconfig.2005.19 ◽

2006 ◽

Cited By ~ 2

Author(s):

O. Laakkonen ◽

H. Saren ◽

K. Rauma ◽

O. Pyrhonen

Keyword(s):

Fpga Implementation

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A Novel FPGA Implementation of a Welding Control Using a New Bus Architecture

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) ◽

10.1109/reconfig.2005.6 ◽

2006 ◽

Cited By ~ 2

Author(s):

K. Rauma ◽

J. Luukko ◽

T. Harkonen ◽

I. Pajari ◽

O. Pyrhonen

Keyword(s):

Fpga Implementation ◽

Bus Architecture

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FPGA-Based Customizable Systolic Architecture for Image Processing Applications

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) ◽

10.1109/reconfig.2005.20 ◽

2006 ◽

Cited By ~ 8

Author(s):

G. Saldana ◽

M. Arias-Estrada

Keyword(s):

Image Processing ◽

Systolic Architecture

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VHDL Core for 1024-Point Radix-4 FFT Computation

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) ◽

10.1109/reconfig.2005.36 ◽

2006 ◽

Cited By ~ 10

Author(s):

J.A. Vite-Frias ◽

R. de Jesus Romero-Troncoso ◽

A. Ordaz-Moreno

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Hardware/Software Implementation of a Discrete Cosine Transform Algorithm Using SystemC

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) ◽

10.1109/reconfig.2005.22 ◽

2006 ◽

Cited By ~ 2

Author(s):

A. Avila ◽

R. Santoyo ◽

S.O. Martinez ◽

G. Dieck

Keyword(s):

Discrete Cosine Transform ◽

Software Implementation ◽

Cosine Transform

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An FPGA-Based Coprocessor for the SPHINX Speech Recognition System: Early Experiences

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) ◽

10.1109/reconfig.2005.10 ◽

2006 ◽

Cited By ~ 2

Author(s):

G. Marcus ◽

J.A. Nolazco-FIores

Keyword(s):

Speech Recognition ◽

Recognition System ◽

Speech Recognition System ◽

Early Experiences

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2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Quartz: A Framework for Correct and Efficient Reconfigurable Design

FPGA Implementation of a Synchronous and Self-Timed Neuroprocessor

Hierarchical FPGA Clustering Based on a Multilevel Partitioning Approach to Improve Routability and Reduce Power Dissapation

An FPGA Arithmetic Logic Unite for Computing Scalar Multiplication Using the Half-and-Add Method

FPGA Implementation of DSVPWM Modulator

A Novel FPGA Implementation of a Welding Control Using a New Bus Architecture

FPGA-Based Customizable Systolic Architecture for Image Processing Applications

VHDL Core for 1024-Point Radix-4 FFT Computation

Hardware/Software Implementation of a Discrete Cosine Transform Algorithm Using SystemC

An FPGA-Based Coprocessor for the SPHINX Speech Recognition System: Early Experiences

2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05)
Latest Publications