Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324)
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Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1145/513918.514134 ◽

2002 ◽

Cited By ~ 8

Author(s):

Jaesik Lee ◽

Ki-Wook Kim ◽

Sung-Mo Kang

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Panel: what's the next eda driver?

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1109/dac.2002.1012705 ◽

2002 ◽

Cited By ~ 1

Author(s):

J. Rabaey ◽

J. Kunkel

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An optimal voltage synthesis technique for a power-efficient satellite application

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1109/dac.2002.1012675 ◽

2002 ◽

Author(s):

Dong-In Kang ◽

Jinwoo Suh ◽

S.P. Crago

Keyword(s):

Power Efficient ◽

Synthesis Technique

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A novel wavelet transform based transient current analysis for fault detection and localization

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1145/513918.514011 ◽

2002 ◽

Cited By ~ 2

Author(s):

Swarup Bhunia ◽

Kaushik Roy ◽

Jaume Segura

Keyword(s):

Wavelet Transform ◽

Fault Detection ◽

Transient Current ◽

Current Analysis ◽

Detection And Localization

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An integrated algorithm for memory allocation and assignment in high-level synthesis

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1145/513918.514072 ◽

2002 ◽

Cited By ~ 2

Author(s):

Jaewon Seo ◽

Taewhan Kim ◽

Preeti R. Panda

Keyword(s):

High Level Synthesis ◽

Memory Allocation ◽

High Level

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TCG-S: orthogonal coupling of P*-admissible representations for general floorplans

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1109/dac.2002.1012739 ◽

2002 ◽

Cited By ~ 2

Author(s):

Jai-Ming Lin ◽

Yao-Wen Chang

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On output response compression in the presence of unknown output values

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1109/dac.2002.1012631 ◽

2002 ◽

Cited By ~ 46

Author(s):

I. Pomeranz ◽

S. Kundu ◽

S.M. Reddy

Keyword(s):

Output Response

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Transformation based communication and clock domain refinement for system design

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1109/dac.2002.1012636 ◽

2002 ◽

Cited By ~ 5

Author(s):

I. Sander ◽

A. Jantsch

Keyword(s):

System Design

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Address assignment combined with scheduling in DSP code generation

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1109/dac.2002.1012624 ◽

2002 ◽

Cited By ~ 3

Author(s):

Yoonseo Choi ◽

Taewhan Kim

Keyword(s):

Code Generation

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A fast on-chip profiler memory

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1109/dac.2002.1012589 ◽

2002 ◽

Cited By ~ 1

Author(s):

R. Lysecky ◽

S. Cotterell ◽

F. Vahid

Keyword(s):

On Chip

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Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

VeriCDF

Panel: what's the next eda driver?

An optimal voltage synthesis technique for a power-efficient satellite application

A novel wavelet transform based transient current analysis for fault detection and localization

An integrated algorithm for memory allocation and assignment in high-level synthesis

TCG-S: orthogonal coupling of P*-admissible representations for general floorplans

On output response compression in the presence of unknown output values

Transformation based communication and clock domain refinement for system design

Address assignment combined with scheduling in DSP code generation

A fast on-chip profiler memory

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324)
Latest Publications