Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14
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9781450326711

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Hardware acceleration of database operations

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14 ◽

10.1145/2554688.2554787 ◽

2014 ◽

Cited By ~ 84

Author(s):

Jared Casper ◽

Kunle Olukotun

Keyword(s):

Hardware Acceleration ◽

Database Operations

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Quantifying the cost and benefit of latency insensitive communication on FPGAs

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14 ◽

10.1145/2554688.2554786 ◽

2014 ◽

Cited By ~ 7

Author(s):

Kevin E. Murray ◽

Vaughn Betz

Keyword(s):

Cost And Benefit ◽

The Cost ◽

Latency Insensitive

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Application specific processor with high level synthesized instructions (abstract only)

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14 ◽

10.1145/2554688.2554754 ◽

2014 ◽

Author(s):

Viktor Puš ◽

Pavel Benáček

Keyword(s):

High Level ◽

Application Specific

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Optimally mitigating BTI-induced FPGA device aging with discriminative voltage scaling (abstract only)

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14 ◽

10.1145/2554688.2554752 ◽

2014 ◽

Author(s):

Yu Bai ◽

Mohammed Alawad ◽

Mingjie Lin

Keyword(s):

Voltage Scaling ◽

Device Aging

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Future inter-FPGA communication architecture for multi-FPGA based prototyping (abstract only)

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14 ◽

10.1145/2554688.2554747 ◽

2014 ◽

Cited By ~ 1

Author(s):

Qingshan Tang ◽

Matthieu Tuna ◽

Habib Mehrez

Keyword(s):

Communication Architecture

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Improving the security and the scalability of the AES algorithm (abstract only)

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14 ◽

10.1145/2554688.2554735 ◽

2014 ◽

Author(s):

Alessandro A. Nacci ◽

Vincenzo Rana ◽

Marco D. Santambrogio ◽

Donatella Sciuto

Keyword(s):

Aes Algorithm

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An automatic netlist and floorplanning approach to improve the MTTR of scrubbing techniques (abstract only)

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14 ◽

10.1145/2554688.2554730 ◽

2014 ◽

Author(s):

Bernhard Schmidt ◽

Daniel Ziener ◽

Jürgen Teich

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On energy efficiency and amdahl's law in FPGA based chip heterogeneous multiprocessor systems (abstract only)

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14 ◽

10.1145/2554688.2554719 ◽

2014 ◽

Author(s):

Sen Ma ◽

David Andrews

Keyword(s):

Energy Efficiency ◽

Multiprocessor Systems ◽

Amdahl’S Law ◽

Heterogeneous Multiprocessor

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FPGA LUT design for wide-band dynamic voltage and frequency scaled operation (abstract only)

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14 ◽

10.1145/2554688.2554708 ◽

2014 ◽

Author(s):

Monther Abusultan ◽

Sunil P. Khatri

Keyword(s):

Wide Band ◽

Dynamic Voltage

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A configurable mapreduce accelerator for multi-core FPGAs (abstract only)

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14 ◽

10.1145/2554688.2554700 ◽

2014 ◽

Cited By ~ 2

Author(s):

Christoforos Kachris ◽

Georgios Ch. Sirakoulis ◽

Dimitrios Soudris

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Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

Hardware acceleration of database operations

Quantifying the cost and benefit of latency insensitive communication on FPGAs

Application specific processor with high level synthesized instructions (abstract only)

Optimally mitigating BTI-induced FPGA device aging with discriminative voltage scaling (abstract only)

Future inter-FPGA communication architecture for multi-FPGA based prototyping (abstract only)

Improving the security and the scalability of the AES algorithm (abstract only)

An automatic netlist and floorplanning approach to improve the MTTR of scrubbing techniques (abstract only)

On energy efficiency and amdahl's law in FPGA based chip heterogeneous multiprocessor systems (abstract only)

FPGA LUT design for wide-band dynamic voltage and frequency scaled operation (abstract only)

A configurable mapreduce accelerator for multi-core FPGAs (abstract only)

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays - FPGA '14
Latest Publications