2004 International Symposium on System-on-Chip, 2004. Proceedings.
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An in-circuit debug environment for multiprocessor SOCs based on a HDL risc soft-core

2004 International Symposium on System-on-Chip, 2004. Proceedings. ◽

10.1109/issoc.2004.1411183 ◽

2005 ◽

Author(s):

R. Pelliconi ◽

F. Campi ◽

L. Salsa ◽

C. Mucci ◽

S. Macchiavelli

Keyword(s):

Soft Core

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Design reuse and design for reuse, a case study on HDSL2

2004 International Symposium on System-on-Chip, 2004. Proceedings. ◽

10.1109/issoc.2004.1411165 ◽

2005 ◽

Author(s):

T. Abonen ◽

J. Nurmi

Keyword(s):

Design Reuse ◽

Design For Reuse

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Evaluation of platform architecture performance using abstract instruction-level workload models

2004 International Symposium on System-on-Chip, 2004. Proceedings. ◽

10.1109/issoc.2004.1411143 ◽

2005 ◽

Cited By ~ 7

Author(s):

J. Kreku ◽

T. Kauppi ◽

J.-P. Soininen

Keyword(s):

Platform Architecture ◽

Workload Models

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Design of a guaranteed throughput router for on-chip networks

2004 International Symposium on System-on-Chip, 2004. Proceedings. ◽

10.1109/issoc.2004.1411137 ◽

2005 ◽

Author(s):

S. Sathe ◽

D. Wiklund ◽

D. Liu

Keyword(s):

On Chip

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Ec-a compiler for the e-language

2004 International Symposium on System-on-Chip, 2004. Proceedings. ◽

10.1109/issoc.2004.1411175 ◽

2005 ◽

Cited By ~ 1

Author(s):

M. Forsell

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SoC-mobinet: broadband transceiver design challenges

2004 International Symposium on System-on-Chip, 2004. Proceedings. ◽

10.1109/issoc.2004.1411157 ◽

2005 ◽

Author(s):

F. Dielacher

Keyword(s):

Transceiver Design ◽

Design Challenges

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A fully integrated low-if DVB-T receiver architecture

2004 International Symposium on System-on-Chip, 2004. Proceedings. ◽

10.1109/issoc.2004.1411182 ◽

2005 ◽

Cited By ~ 2

Author(s):

G. Andrijevic ◽

H. Magnusson ◽

H. Olsson

Keyword(s):

Fully Integrated ◽

Receiver Architecture

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A reconfigurable FPU as IP component for SoCs

2004 International Symposium on System-on-Chip, 2004. Proceedings. ◽

10.1109/issoc.2004.1411160 ◽

2005 ◽

Cited By ~ 11

Author(s):

C. Brunelli ◽

F. Campi ◽

J. Kylliainen ◽

J. Nurmi

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Crosstalk immune interconnect driver design

2004 International Symposium on System-on-Chip, 2004. Proceedings. ◽

10.1109/issoc.2004.1411168 ◽

2005 ◽

Cited By ~ 2

Author(s):

R. Weerasekera ◽

Li-Rong Zheng ◽

D. Pamunuwa ◽

H. Tenhunen

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Estimation of a maximum bound of uncertain parameter fluctuations with applications to analogue IP-cores

2004 International Symposium on System-on-Chip, 2004. Proceedings. ◽

10.1109/issoc.2004.1411176 ◽

2005 ◽

Cited By ~ 5

Author(s):

H.J. Kadim

Keyword(s):

Uncertain Parameter ◽

Ip Cores

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2004 International Symposium on System-on-Chip, 2004. Proceedings.Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

An in-circuit debug environment for multiprocessor SOCs based on a HDL risc soft-core

Design reuse and design for reuse, a case study on HDSL2

Evaluation of platform architecture performance using abstract instruction-level workload models

Design of a guaranteed throughput router for on-chip networks

Ec-a compiler for the e-language

SoC-mobinet: broadband transceiver design challenges

A fully integrated low-if DVB-T receiver architecture

A reconfigurable FPU as IP component for SoCs

Crosstalk immune interconnect driver design

Estimation of a maximum bound of uncertain parameter fluctuations with applications to analogue IP-cores

2004 International Symposium on System-on-Chip, 2004. Proceedings.
Latest Publications