Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29
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Published By IEEE Comput. Soc. Press

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Compiler synthesized dynamic branch prediction

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29 ◽

10.1109/micro.1996.566458 ◽

2002 ◽

Author(s):

S. Mahlke ◽

B. Natarajan

Keyword(s):

Branch Prediction

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Assigning confidence to conditional branch predictions

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29 ◽

10.1109/micro.1996.566457 ◽

2002 ◽

Author(s):

E. Jacobsen ◽

E. Rotenberg ◽

J.E. Smith

Keyword(s):

Conditional Branch

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Instruction scheduling and executable editing

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29 ◽

10.1109/micro.1996.566469 ◽

2002 ◽

Author(s):

E. Schnarr ◽

J.R. Larus

Keyword(s):

Instruction Scheduling

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Heuristics for register-constrained software pipelining

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29 ◽

10.1109/micro.1996.566466 ◽

2002 ◽

Author(s):

J. Llosa ◽

M. Valero ◽

E. Ayguade

Keyword(s):

Software Pipelining

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Optimization for a superscalar out-of-order machine

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29 ◽

10.1109/micro.1996.566473 ◽

2002 ◽

Author(s):

A.M. Holler

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Java bytecode to native code translation: the Caffeine prototype and preliminary results

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29 ◽

10.1109/micro.1996.566453 ◽

2002 ◽

Author(s):

C.-H.A. Hsieh ◽

J.C. Gyllenhaal ◽

W.W. Hwu

Keyword(s):

Preliminary Results ◽

Java Bytecode ◽

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Trace cache: a low latency approach to high bandwidth instruction fetching

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29 ◽

10.1109/micro.1996.566447 ◽

2002 ◽

Author(s):

E. Rotenberg ◽

S. Bennett ◽

J.E. Smith

Keyword(s):

Low Latency ◽

High Bandwidth ◽

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Tango: a hardware-based data prefetching technique for superscalar processors

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29 ◽

10.1109/micro.1996.566463 ◽

2002 ◽

Author(s):

S.S. Pinter ◽

A. Yoaz

Keyword(s):

Data Prefetching ◽

Superscalar Processors ◽

Prefetching Technique

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Increasing the instruction fetch rate via block-structured instruction set architectures

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29 ◽

10.1109/micro.1996.566461 ◽

2002 ◽

Author(s):

E. Hao ◽

Po-Yung Chang ◽

M. Evers ◽

Y.N. Patt

Keyword(s):

Instruction Set ◽

Instruction Fetch ◽

Block Structured

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Design decisions influencing the UltraSPARC's instruction fetch architecture

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29 ◽

10.1109/micro.1996.566460 ◽

2002 ◽

Author(s):

R. Yung

Keyword(s):

Design Decisions ◽

Instruction Fetch

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