Low-Noise Low-Power Design for Phase-Locked Loops
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Published By Springer International Publishing

9783319121994, 9783319122007

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Design and Analysis of QVCO with Various Coupling Techniques

Low-Noise Low-Power Design for Phase-Locked Loops ◽

10.1007/978-3-319-12200-7_4 ◽

2014 ◽

pp. 41-65

Author(s):

Feng Zhao ◽

Fa Foster Dai

Keyword(s):

Coupling Techniques

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Introduction

Low-Noise Low-Power Design for Phase-Locked Loops ◽

10.1007/978-3-319-12200-7_1 ◽

2014 ◽

pp. 1-11

Author(s):

Feng Zhao ◽

Fa Foster Dai

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Conclusions

Low-Noise Low-Power Design for Phase-Locked Loops ◽

10.1007/978-3-319-12200-7_6 ◽

2014 ◽

pp. 95-96

Author(s):

Feng Zhao ◽

Fa Foster Dai

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Analysis of Quantization Noise Reduction Techniques for Fractional-N PLL

Low-Noise Low-Power Design for Phase-Locked Loops ◽

10.1007/978-3-319-12200-7_2 ◽

2014 ◽

pp. 13-24

Author(s):

Feng Zhao ◽

Fa Foster Dai

Keyword(s):

Noise Reduction ◽

Quantization Noise ◽

Reduction Techniques

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Design and Analysis of A Low Power QVCO with Capacitive-Coupling Technique

Low-Noise Low-Power Design for Phase-Locked Loops ◽

10.1007/978-3-319-12200-7_5 ◽

2014 ◽

pp. 67-94

Author(s):

Feng Zhao ◽

Fa Foster Dai

Keyword(s):

Low Power ◽

Capacitive Coupling ◽

Coupling Technique

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A Wide-Band Low Power BiCMOS PLL

Low-Noise Low-Power Design for Phase-Locked Loops ◽

10.1007/978-3-319-12200-7_3 ◽

2014 ◽

pp. 25-39

Author(s):

Feng Zhao ◽

Fa Foster Dai

Keyword(s):

Low Power ◽

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