2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
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(FIVE YEARS 0)

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(FIVE YEARS 0)

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9781538647479

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Organizing Committee

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) ◽

10.1109/async.2019.00006 ◽

2019 ◽

A Hierarchical Approach to Self-Timed Circuit Verification

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) ◽

10.1109/async.2019.00022 ◽

2019 ◽

Author(s):

Cuong Chau ◽

Warren A. Hunt ◽

Matt Kaufmann ◽

Marly Roncken ◽

Ivan Sutherland

Keyword(s):

Hierarchical Approach ◽

Circuit Verification

AnARM: A 28nm Energy Efficient ARM Processor Based on Octasic Asynchronous Technology

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) ◽

10.1109/async.2019.00016 ◽

2019 ◽

Author(s):

Mickael Fiorentino ◽

Claude Thibeault ◽

Yvon Savaria ◽

Francois Gagnon ◽

Tom Awad ◽

...

Keyword(s):

Energy Efficient ◽

Arm Processor

Program Committee (Primary Reviewers)

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) ◽

10.1109/async.2019.00007 ◽

2019 ◽

Keyword(s):

Program Committee

Secondary Reviewers

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) ◽

10.1109/async.2019.00008 ◽

2019 ◽

Author Index

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) ◽

10.1109/async.2019.00026 ◽

2019 ◽

From Signal Transition Graphs to Timing Closure: Application to Bundled-Data Circuits

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) ◽

10.1109/async.2019.00020 ◽

2019 ◽

Author(s):

Gregoire Gimenez ◽

Jean Simatic ◽

Laurent Fesquet

Keyword(s):

Timing Closure ◽

Transition Graphs

Transistor-Level Analysis of Dynamic Delay Models

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) ◽

10.1109/async.2019.00019 ◽

2019 ◽

Author(s):

Jurgen Maier ◽

Matthias Fugger ◽

Thomas Nowak ◽

Ulrich Schmid

Keyword(s):

Delay Models ◽

Level Analysis

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) ◽

10.1109/async.2019.00004 ◽

2019 ◽

Message from the Chairs

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) ◽

10.1109/async.2019.00005 ◽

2019 ◽

Keyword(s):

The Chairs

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Organizing Committee

A Hierarchical Approach to Self-Timed Circuit Verification

AnARM: A 28nm Energy Efficient ARM Processor Based on Octasic Asynchronous Technology

Program Committee (Primary Reviewers)

Secondary Reviewers

Author Index

From Signal Transition Graphs to Timing Closure: Application to Bundled-Data Circuits

Transistor-Level Analysis of Dynamic Delay Models

Table of contents

Message from the Chairs

Export Citation Format

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Organizing Committee

A Hierarchical Approach to Self-Timed Circuit Verification

AnARM: A 28nm Energy Efficient ARM Processor Based on Octasic Asynchronous Technology

Program Committee (Primary Reviewers)

Secondary Reviewers

Author Index

From Signal Transition Graphs to Timing Closure: Application to Bundled-Data Circuits

Transistor-Level Analysis of Dynamic Delay Models

Table of contents

Message from the Chairs

2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
Latest Publications