NORCHIP 2010
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9781424489725
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High-level design error diagnosis using backtrace on decision diagrams

NORCHIP 2010 ◽  
2010 ◽  
Author(s):  
Jaan Raik ◽  
Urmas Repinski ◽  
Raimund Ubar ◽  
Maksim Jenihhin ◽  
Anton Chepurov
Keyword(s):  
Decision Diagrams ◽  
Error Diagnosis ◽  
Design Error ◽  
Level Design ◽  
High Level

Simulation of thermal behavior for Networks-on-Chip

NORCHIP 2010 ◽  
2010 ◽  
Author(s):  
Tim Wegner ◽  
Claas Cornelius ◽  
Martin Gag ◽  
Andreas Tockhorn ◽  
Adelinde Uhrmacher
Keyword(s):  
Thermal Behavior ◽  
Networks On Chip ◽  
On Chip

Layered Spiral Algorithm for memory-aware mapping and scheduling on Network-on-Chip

NORCHIP 2010 ◽  
2010 ◽  
Author(s):  
Shuo Li ◽  
Fahimeh Jafari ◽  
Ahmed Hemani ◽  
Shashi Kumar
Keyword(s):  
Network On Chip ◽  
On Chip

An analysis of designing 2D/3D chip multiprocessor wit different cache architecture

NORCHIP 2010 ◽  
2010 ◽  
Author(s):  
Thomas Canhao Xu ◽  
Liang Guang ◽  
Alexander Wei Yin ◽  
Bo Yang ◽  
Pasi Liljeberg ◽  
...  
Keyword(s):  
Chip Multiprocessor ◽  
Cache Architecture

SOC chip scheduler embodying I-slip algorithm

NORCHIP 2010 ◽  
2010 ◽  
Author(s):  
Trupti B. Salankar ◽  
Vilas A Nitnaware
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