Proceedings. 16th IEEE Symposium on Computer Arithmetic
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Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

scholarly journals Hybrid BIST time minimization for core-based systems with STUMPS architecture

2004 ◽  
Author(s):  
G. Jervan ◽  
P. Eles ◽  
Z. Peng ◽  
R. Ubar ◽  
M. Jenihhin
Keyword(s):  
Time Minimization

Regressive testing for system-on-chip with unknown-good-yield

2004 ◽  
Author(s):  
N.-J. Park ◽  
B. Jin ◽  
K.M. George ◽  
N. Park ◽  
M. Choi
Keyword(s):  
Good Yield ◽  
System On Chip ◽  
On Chip

Error detection in signed digit arithmetic circuit with parity checker [adder example]

2004 ◽  
Author(s):  
G.C. Cardarilli ◽  
M. Ottavi ◽  
S. Pontarelli ◽  
M. Re ◽  
A. Salsano
Keyword(s):  
Error Detection ◽  
Arithmetic Circuit ◽  
Parity Checker

An integrated fault-tolerant design framework for VLIW processors

2004 ◽  
Author(s):  
Yung-Yuan Chen ◽  
Shi-Jinn Horng ◽  
Hung-Chuan Lai
Keyword(s):  
Fault Tolerant ◽  
Design Framework ◽  
Vliw Processors ◽  
Fault Tolerant Design

Embedded compact deterministic test for IP-protected cores

2004 ◽  
Author(s):  
A.B. Kinsman ◽  
J.I. Hewitt ◽  
N. Nicolici

SIED: software implemented error detection

2004 ◽  
Author(s):  
B. Nicolescu ◽  
Y. Savaria ◽  
R. Velazco
Keyword(s):  
Error Detection

An FFT approximation technique suitable for on-chip generation and analysis of sinusoidal signals

2004 ◽  
Author(s):  
J.M. Emmert ◽  
J.A. Cheatham ◽  
Badhri Jagannathan ◽  
Sandeep Umarani
Keyword(s):  
Approximation Technique ◽  
Sinusoidal Signals ◽  
On Chip

Fault tolerant Hopfield associative memory on torus

2004 ◽  
Author(s):  
R.A. Ayoubi ◽  
H.A. Ziade ◽  
M.A. Bayoumi
Keyword(s):  
Associative Memory ◽  
Fault Tolerant
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