Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222)
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Published By IEEE Comput. Soc

0818684097

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On the characterization of multi-point nets in electronic designs

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) ◽

10.1109/glsv.1998.665303 ◽

2002 ◽

Cited By ~ 8

Author(s):

D. Stroobandt ◽

F.J. Kurdahi

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Low power memory architectures for video applications

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) ◽

10.1109/glsv.1998.665190 ◽

2002 ◽

Cited By ~ 7

Author(s):

B. Kapoor

Keyword(s):

Low Power ◽

Memory Architectures

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Digital arithmetic using analog arrays

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) ◽

10.1109/glsv.1998.665226 ◽

2002 ◽

Cited By ~ 5

Author(s):

S. Sadeghi-Emamchaie ◽

G.A. Jullien ◽

V. Dimitrov ◽

W.C. Miller

Keyword(s):

Digital Arithmetic ◽

Analog Arrays

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An architecture of full-search block matching for minimum memory bandwidth requirement

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) ◽

10.1109/glsv.1998.665217 ◽

2002 ◽

Cited By ~ 1

Author(s):

Jen-Chien Tuan ◽

Chein-Wei Jen

Keyword(s):

Block Matching ◽

Memory Bandwidth ◽

Bandwidth Requirement ◽

Full Search

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Identifying high-level components in combinational circuits

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) ◽

10.1109/glsv.1998.665284 ◽

2002 ◽

Cited By ~ 5

Author(s):

T. Doom ◽

J. White ◽

A. Wojcik ◽

G. Chisholm

Keyword(s):

Combinational Circuits ◽

High Level

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Standard data representations for VLSI algorithm development

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) ◽

10.1109/glsv.1998.665342 ◽

2002 ◽

Author(s):

D. Hertweck ◽

M. Nica ◽

S. Park ◽

C. Purdy

Keyword(s):

Algorithm Development ◽

Standard Data ◽

Data Representations ◽

Vlsi Algorithm

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A quantitative study of the benefits of area-I/O in FPGAs

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) ◽

10.1109/glsv.1998.665331 ◽

2002 ◽

Cited By ~ 1

Author(s):

H. Van Marck ◽

J. Depreitere ◽

D. Stroobandt ◽

J. Van Campenhout

Keyword(s):

Quantitative Study

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Stochastic evolution algorithm for technology mapping

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) ◽

10.1109/glsv.1998.665326 ◽

2002 ◽

Author(s):

A.S. Al-Mulhem ◽

A. Amin ◽

H. Youssef

Keyword(s):

Technology Mapping ◽

Stochastic Evolution ◽

Evolution Algorithm

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Merged arithmetic for computing wavelet transforms

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) ◽

10.1109/glsv.1998.665225 ◽

2002 ◽

Cited By ~ 4

Author(s):

Gwangwoo Choe ◽

E.E. Swartzlander

Keyword(s):

Wavelet Transforms ◽

Merged Arithmetic

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Power reducing techniques for clocked CMOS PLAs

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) ◽

10.1109/glsv.1998.665196 ◽

2002 ◽

Author(s):

R.F. Hobson

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Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc

On the characterization of multi-point nets in electronic designs

Low power memory architectures for video applications

Digital arithmetic using analog arrays

An architecture of full-search block matching for minimum memory bandwidth requirement

Identifying high-level components in combinational circuits

Standard data representations for VLSI algorithm development

A quantitative study of the benefits of area-I/O in FPGAs

Stochastic evolution algorithm for technology mapping

Merged arithmetic for computing wavelet transforms

Power reducing techniques for clocked CMOS PLAs

Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222)
Latest Publications