Proceedings International Test Conference 1996. Test and Design Validity
Latest Publications

TOTAL DOCUMENTS

127

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By Int. Test Conference

0780335414

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A BIST Methodology for Comprehensive Testing of RAM with Reduced Heat Dissipation

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.556985 ◽

2005 ◽

Author(s):

H. Cheung ◽

S.K. Gupta

Keyword(s):

Heat Dissipation

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ITC 1996 Lecture Series on Unpowered Opens Testing

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.557154 ◽

2005 ◽

Cited By ~ 1

Author(s):

K.P. Parker

Keyword(s):

Lecture Series

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The effect of period generation techniques on period resolution and waveform jitter in VLSI test systems

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.557126 ◽

2002 ◽

Cited By ~ 2

Author(s):

M.G. Davis

Keyword(s):

Test Systems ◽

Vlsi Test

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Realistic faults mapping scheme for the fault simulation of integrated analogue CMOS circuits

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.557137 ◽

2002 ◽

Cited By ~ 18

Author(s):

M.J. Ohletz

Keyword(s):

Fault Simulation ◽

Cmos Circuits ◽

Mapping Scheme

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MFBIST: a BIST method for random pattern resistant circuits

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.556960 ◽

2002 ◽

Cited By ~ 18

Author(s):

M.F. AlShaibi ◽

C.R. Kime

Keyword(s):

Random Pattern

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Orthogonal scan: low overhead scan for data paths

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.557123 ◽

2002 ◽

Cited By ~ 26

Author(s):

R.B. Norwood ◽

E.J. McCluskey

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Application of boundary scan in a fault tolerant computer system

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.557141 ◽

2002 ◽

Cited By ~ 1

Author(s):

M. Boutin ◽

P. Dziel

Keyword(s):

Computer System ◽

Fault Tolerant ◽

Boundary Scan

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Novel optical probing system with submicron spatial resolution for internal diagnosis of VLSI circuits

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.556971 ◽

2002 ◽

Cited By ~ 8

Author(s):

K. Ozaki ◽

H. Sekiguchi ◽

S. Wakana ◽

Y. Goto ◽

Y. Umehara ◽

...

Keyword(s):

Spatial Resolution ◽

Vlsi Circuits ◽

Optical Probing

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Analog/digital testing of loaded boards without dedicated test points

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.556978 ◽

2002 ◽

Author(s):

C. Vaucher ◽

L. Balme

Keyword(s):

Digital Testing ◽

Test Points

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Formal verification of the UltraSPARC/sup (TM)/ family of techniques

Proceedings International Test Conference 1996. Test and Design Validity ◽

10.1109/test.1996.557146 ◽

2002 ◽

Cited By ~ 1

Author(s):

M.E. Levitt

Keyword(s):

Formal Verification

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Proceedings International Test Conference 1996. Test and Design ValidityLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Int. Test Conference

A BIST Methodology for Comprehensive Testing of RAM with Reduced Heat Dissipation

ITC 1996 Lecture Series on Unpowered Opens Testing

The effect of period generation techniques on period resolution and waveform jitter in VLSI test systems

Realistic faults mapping scheme for the fault simulation of integrated analogue CMOS circuits

MFBIST: a BIST method for random pattern resistant circuits

Orthogonal scan: low overhead scan for data paths

Application of boundary scan in a fault tolerant computer system

Novel optical probing system with submicron spatial resolution for internal diagnosis of VLSI circuits

Analog/digital testing of loaded boards without dedicated test points

Formal verification of the UltraSPARC/sup (TM)/ family of techniques

Proceedings International Test Conference 1996. Test and Design Validity
Latest Publications