2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)
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9781728100920

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Maximally Asymmetric Multiple-Valued Functions

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2019.00040 ◽

2019 ◽

Cited By ~ 1

Author(s):

Jon T. Butler ◽

Tsutomu Sasao

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2019 IEEE 49th International Symposium on Multiple-Valued Logic

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2019.00001 ◽

2019 ◽

Keyword(s):

International Symposium ◽

Multiple Valued Logic

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Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2019.00026 ◽

2019 ◽

Author(s):

Debjyoti Bhattacharjee ◽

Mathias Soeken ◽

Srijit Dutta ◽

Anupam Chattopadhyay ◽

Giovanni De Micheli

Keyword(s):

Quantum Circuit ◽

Circuit Synthesis

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Remarks on Similarities Among Ternary Bent Functions

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2019.00022 ◽

2019 ◽

Author(s):

Radomir S. Stankovic ◽

Milena Stankovic ◽

Jaakko T. Astola ◽

Claudio Moraga

Keyword(s):

Bent Functions

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Quasi-Postan Logic Hazard of Postan Signals

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2019.00034 ◽

2019 ◽

Author(s):

Maciej Rudziecki

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Comparative Analysis of Full Adder Custom Design Circuit using Two Regular Structures in Quantum-Dot Cellular Automata (QCA)

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2019.00041 ◽

2019 ◽

Cited By ~ 1

Author(s):

Rahul Singhal ◽

Marek Perkowski

Keyword(s):

Comparative Analysis ◽

Cellular Automata ◽

Quantum Dot ◽

Full Adder ◽

Quantum Dot Cellular Automata ◽

Regular Structures ◽

Custom Design

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Symposium Committees

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2019.00007 ◽

2019 ◽

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Noise Convolutional Neural Networks and FPGA Implementation

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2019.00023 ◽

2019 ◽

Author(s):

Atsuki Munakata ◽

Hiroki Nakahara ◽

Shimpei Sato

Keyword(s):

Neural Networks ◽

Convolutional Neural Networks ◽

Fpga Implementation

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Welcome from the Symposium Chair

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2019.00005 ◽

2019 ◽

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Synthesis of Nondeterministic Behavior in Recombinase-Based Genetic Circuits

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2019.00042 ◽

2019 ◽

Author(s):

Zi-Jun Lin ◽

Wei-Chih Huang ◽

Jie-Hong Roland Jiang

Keyword(s):

Genetic Circuits

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2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Maximally Asymmetric Multiple-Valued Functions

2019 IEEE 49th International Symposium on Multiple-Valued Logic

Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis

Remarks on Similarities Among Ternary Bent Functions

Quasi-Postan Logic Hazard of Postan Signals

Comparative Analysis of Full Adder Custom Design Circuit using Two Regular Structures in Quantum-Dot Cellular Automata (QCA)

Symposium Committees

Noise Convolutional Neural Networks and FPGA Implementation

Welcome from the Symposium Chair

Synthesis of Nondeterministic Behavior in Recombinase-Based Genetic Circuits

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)
Latest Publications