Tense De Morgan S4-algebras

In [Tense operators on De Morgan algebras, Log. J. IGPL 22(2) (2014) 255–267], Figallo and Pelaitay introduced the notion of tense operators on De Morgan algebras. Also, other notions of tense operators on De Morgan algebras were given by Chajda and Paseka in [De Morgan algebras with tense operators, J. Mult.-Valued Logic Soft Comput. 1 (2017) 29–45; The Poset-based logics for the De Morgan negation and set representation of partial dynamic De Morgan algebras, J. Mult.-Valued Logic Soft Comput. 31(3) (2018) 213–237; Set representation of partial dynamic De Morgan algebras, in 2016 IEEE 46th Int. Symp. Multiple-Valued Logic (IEEE Computer Society, 2016), pp. 119–124]. In this paper, we introduce a new notion of tense operators on De Morgan algebras and define the class of tense De Morgan [Formula: see text]-algebras. The main purpose of this paper is to give a discrete duality for tense De Morgan [Formula: see text]-algebras. To do this, we will extend the discrete duality given in [W. Dzik, E. Orłowska and C. van Alten, Relational Representation Theorems for Lattices with Negations: A Survey, Lecture Notes in Computer Science (2006), pp. 245–266], for De Morgan algebras.

Investigation of Multiple-valued Logic Technologies for Beyond-binary Era

Computing technologies are currently based on the binary logic/number system, which is dependent on the simple on and off switching mechanism of the prevailing transistors. With the exponential increase of data processing and storage needs, there is a strong push to move to a higher radix logic/number system that can eradicate or lessen many limitations of the binary system. Anticipated saturation of Moore’s law and the necessity to increase information density and processing speed in the future micro and nanoelectronic circuits and systems provide a strong background and motivation for the beyond-binary logic system. In this review article, different technologies for Multiple-valued-Logic (MVL) devices and the associated prospects and constraints are discussed. The feasibility of the MVL system in real-world applications rests on resolving two major challenges: (i) development of an efficient mathematical approach to implement the MVL logic using available technologies, and (ii) availability of effective synthesis techniques. This review of different technologies for the MVL system is intended to perform a comprehensive investigation of various MVL technologies and a comparative analysis of the feasible approaches to implement MVL devices, especially ternary logic.

Swarm intelligence versus direct cover algorithms in synthesis of Multi-Valued Logic functions

Ant Colony Optimization and Particle Swarm Optimization represent two widely used Swarm Intelligence (SI) optimization techniques. Information processing using Multiple-Valued Logic (MVL) is carried out using more than two discrete logic levels. In this paper, we compare two the SI-based algorithms in synthesizing MVL functions. A benchmark consisting of 50,000 randomly generated 2-variable 4-valued functions is used for assessing the performance of the algorithms using the benchmark. Simulation results show that the PSO outperforms the ACO technique in terms of the average number of product terms (PTs) needed. We also compare the results obtained using both ACO-MVL and PSO-MVL with those obtained using Espresso-MV logic minimizer. It is shown that on average, both of the SI-based techniques produced better results compared to those produced by Espresso-MV. We show that the SI-based techniques outperform the conventional direct-cover (DC) techniques in terms of the average number of product terms required.