Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08
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9781605582825

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Edge-centric modulo scheduling for coarse-grained reconfigurable architectures

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08 ◽

10.1145/1454115.1454140 ◽

2008 ◽

Cited By ~ 108

Author(s):

Hyunchul Park ◽

Kevin Fan ◽

Scott A. Mahlke ◽

Taewook Oh ◽

Heeseok Kim ◽

...

Keyword(s):

Coarse Grained ◽

Reconfigurable Architectures ◽

Modulo Scheduling

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Visualizing potential parallelism in sequential programs

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08 ◽

10.1145/1454115.1454129 ◽

2008 ◽

Cited By ~ 8

Author(s):

Graham D. Price ◽

John Giacomoni ◽

Manish Vachharajani

Keyword(s):

Sequential Programs

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Distributed cooperative caching

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08 ◽

10.1145/1454115.1454136 ◽

2008 ◽

Cited By ~ 29

Author(s):

Enric Herrero ◽

José González ◽

Ramon Canal

Keyword(s):

Cooperative Caching

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Multi-mode energy management for multi-tier server clusters

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08 ◽

10.1145/1454115.1454153 ◽

2008 ◽

Cited By ~ 59

Author(s):

Tibor Horvath ◽

Kevin Skadron

Keyword(s):

Energy Management ◽

Server Clusters ◽

Mode Energy ◽

Multi Mode

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Multitasking workload scheduling on flexible-core chip multiprocessors

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08 ◽

10.1145/1454115.1454142 ◽

2008 ◽

Cited By ~ 8

Author(s):

Divya P. Gulati ◽

Changkyu Kim ◽

Simha Sethumadhavan ◽

Stephen W. Keckler ◽

Doug Burger

Keyword(s):

Chip Multiprocessors ◽

Workload Scheduling ◽

Flexible Core

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Leveraging on-chip networks for data cache migration in chip multiprocessors

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08 ◽

10.1145/1454115.1454144 ◽

2008 ◽

Cited By ~ 20

Author(s):

Noel Eisley ◽

Li-Shiuan Peh ◽

Li Shang

Keyword(s):

Chip Multiprocessors ◽

Data Cache ◽

On Chip

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Improving support for locality and fine-grain sharing in chip multiprocessors

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08 ◽

10.1145/1454115.1454138 ◽

2008 ◽

Cited By ~ 16

Author(s):

Hemayet Hossain ◽

Sandhya Dwarkadas ◽

Michael C. Huang

Keyword(s):

Chip Multiprocessors ◽

Fine Grain

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Characterizing and modeling the behavior of context switch misses

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08 ◽

10.1145/1454115.1454130 ◽

2008 ◽

Cited By ~ 23

Author(s):

Fang Liu ◽

Fei Guo ◽

Yan Solihin ◽

Seongbeom Kim ◽

Abdulaziz Eker

Keyword(s):

Context Switch

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Skewed redundancy

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08 ◽

10.1145/1454115.1454126 ◽

2008 ◽

Cited By ~ 2

Author(s):

Gordon B. Bell ◽

Mikko H. Lipasti

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Multi-optimization power management for chip multiprocessors

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08 ◽

10.1145/1454115.1454141 ◽

2008 ◽

Cited By ~ 52

Author(s):

Ke Meng ◽

Russ Joseph ◽

Robert P. Dick ◽

Li Shang

Keyword(s):

Power Management ◽

Chip Multiprocessors

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Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

Edge-centric modulo scheduling for coarse-grained reconfigurable architectures

Visualizing potential parallelism in sequential programs

Distributed cooperative caching

Multi-mode energy management for multi-tier server clusters

Multitasking workload scheduling on flexible-core chip multiprocessors

Leveraging on-chip networks for data cache migration in chip multiprocessors

Improving support for locality and fine-grain sharing in chip multiprocessors

Characterizing and modeling the behavior of context switch misses

Skewed redundancy

Multi-optimization power management for chip multiprocessors

Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08
Latest Publications