Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17
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9781450343541

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A Parallelized Iterative Improvement Approach to Area Optimization for LUT-Based Technology Mapping

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17 ◽

10.1145/3020078.3021735 ◽

2017 ◽

Author(s):

Gai Liu ◽

Zhiru Zhang

Keyword(s):

Technology Mapping ◽

Iterative Improvement ◽

Area Optimization

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Improving the Performance of OpenCL-based FPGA Accelerator for Convolutional Neural Network

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17 ◽

10.1145/3020078.3021698 ◽

2017 ◽

Author(s):

Jialiang Zhang ◽

Jing Li

Keyword(s):

Neural Network ◽

Convolutional Neural Network

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NAND-NOR

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17 ◽

10.1145/3020078.3021750 ◽

2017 ◽

Author(s):

Zhihong Huang ◽

Xing Wei ◽

Grace Zgheib ◽

Wei Li ◽

Yu Lin ◽

...

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Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17 ◽

10.1145/3020078.3021754 ◽

2017 ◽

Author(s):

Steve Dai ◽

Ritchie Zhao ◽

Gai Liu ◽

Shreesha Srinath ◽

Udit Gupta ◽

...

Keyword(s):

High Level Synthesis ◽

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Frequency Domain Acceleration of Convolutional Neural Networks on CPU-FPGA Shared Memory System

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17 ◽

10.1145/3020078.3021727 ◽

2017 ◽

Author(s):

Chi Zhang ◽

Viktor Prasanna

Keyword(s):

Neural Networks ◽

Frequency Domain ◽

Shared Memory ◽

Convolutional Neural Networks ◽

Memory System ◽

Shared Memory System

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Corolla

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17 ◽

10.1145/3020078.3021732 ◽

2017 ◽

Author(s):

Minghua Shen ◽

Guojie Luo

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Cache Timing Attacks from The SoCFPGA Coherency Port (Abstract Only)

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17 ◽

10.1145/3020078.3021802 ◽

2017 ◽

Author(s):

Sumanta Chaudhuri

Keyword(s):

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CPU-FPGA Co-Optimization for Big Data Applications

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17 ◽

10.1145/3020078.3021787 ◽

2017 ◽

Author(s):

Jason Cong ◽

Zhenman Fang ◽

Muhuan Huang ◽

Libo Wang ◽

Di Wu

Keyword(s):

Big Data ◽

Big Data Applications

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Joint Modulo Scheduling and Memory Partitioning with Multi-Bank Memory for High-Level Synthesis (Abstract Only)

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17 ◽

10.1145/3020078.3021778 ◽

2017 ◽

Author(s):

Tianyi Lu ◽

Shouyi Yin ◽

Xianqing Yao ◽

Zhicong Xie ◽

Leibo Liu ◽

...

Keyword(s):

High Level Synthesis ◽

Modulo Scheduling ◽

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Accelerating Financial Market Server through Hybrid List Design (Abstract Only)

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17 ◽

10.1145/3020078.3021775 ◽

2017 ◽

Author(s):

Haohuan Fu ◽

Conghui He ◽

Huabin Ruan ◽

Itay Greenspon ◽

Wayne Luk ◽

...

Keyword(s):

Financial Market

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