Analog VLSI Neural Networks
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11

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Published By Springer US

9781461365921, 9781461535829

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CMOS Analog/Digital Circuit of the Hysteresis McCulloch-Pitts Neuron for Ramsey Numbers

Analog VLSI Neural Networks ◽

10.1007/978-1-4615-3582-9_6 ◽

1992 ◽

pp. 51-60

Author(s):

Yong Beom Cho ◽

Kazuhiro Tsuchiya ◽

Yoshiyasu Takefuji

Keyword(s):

Digital Circuit ◽

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Competitive Learning in Asynchronous-Pulse-Density Integrated Circuits

Analog VLSI Neural Networks ◽

10.1007/978-1-4615-3582-9_7 ◽

1992 ◽

pp. 61-82

Author(s):

David A. Watola ◽

Jack L. Meador

Keyword(s):

Integrated Circuits ◽

Competitive Learning ◽

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Full Analog CMOS Integration of Very Large Time Constants for Synaptic Transfer in Neural Networks

Analog VLSI Neural Networks ◽

10.1007/978-1-4615-3582-9_4 ◽

1992 ◽

pp. 19-33 ◽

Author(s):

P. Kinget ◽

M. Steyaert ◽

J. Spiegel

Keyword(s):

Neural Networks ◽

Time Constants ◽

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Analog Computational Models of Concept Formation

Analog VLSI Neural Networks ◽

10.1007/978-1-4615-3582-9_2 ◽

1992 ◽

pp. 3-10

Author(s):

Yoh-Han Pao ◽

Wassim Hafez

Keyword(s):

Concept Formation ◽

Computational Models

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An Analog BiCMOS Hopfield Neuron

Analog VLSI Neural Networks ◽

10.1007/978-1-4615-3582-9_3 ◽

1992 ◽

pp. 11-17

Author(s):

Paul W. Hollis ◽

John J. Paulos

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A Super Parallel Sorter Using a Binary Neural Network with AND-OR Synaptic Connections

Analog VLSI Neural Networks ◽

10.1007/978-1-4615-3582-9_11 ◽

1992 ◽

pp. 127-131

Author(s):

Manabu Yamada ◽

Tohru Nakagawa ◽

Hajime Kitagawa

Keyword(s):

Neural Network ◽

Synaptic Connections ◽

Binary Neural Network

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Guest Editorial

Analog VLSI Neural Networks ◽

10.1007/978-1-4615-3582-9_1 ◽

1992 ◽

pp. 1-2 ◽

Author(s):

Yoshiyasu Takefuji

Keyword(s):

Guest Editorial

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Two-Stage Neural Network Architecture for Feedback Control of Dynamic Systems

Analog VLSI Neural Networks ◽

10.1007/978-1-4615-3582-9_9 ◽

1992 ◽

pp. 91-103

Author(s):

Stephen M. Phillips ◽

Christoph Müller-Dott

Keyword(s):

Neural Network ◽

Feedback Control ◽

Dynamic Systems ◽

Network Architecture ◽

Neural Network Architecture ◽

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A Programmable Analog CMOS Synapse for Neural Networks

Analog VLSI Neural Networks ◽

10.1007/978-1-4615-3582-9_8 ◽

1992 ◽

pp. 83-90

Author(s):

Seokjin Kim ◽

Yong-Chul Shin ◽

Naidu C. R. Bogineni ◽

Ramalingam Sridhar

Keyword(s):

Neural Networks ◽

Programmable Analog ◽

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A Hierarchical Clustering Network Based on a Model of Olfactory Processing

Analog VLSI Neural Networks ◽

10.1007/978-1-4615-3582-9_5 ◽

1992 ◽

pp. 35-49

Author(s):

P. A. Shoemaker ◽

C. G. Hutchens ◽

S. B. Patil

Keyword(s):

Hierarchical Clustering ◽

Olfactory Processing

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