Network Theory and Applications - Layout Optimization in VLSI Design
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Published By Springer US

9781441952066, 9781475734157

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Techniques for Timing-Driven Routing

Network Theory and Applications - Layout Optimization in VLSI Design ◽

10.1007/978-1-4757-3415-7_5 ◽

2001 ◽

pp. 125-153

Author(s):

John Lillis

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Non-Hanan Optimization for Global VLSI Interconnect

Network Theory and Applications - Layout Optimization in VLSI Design ◽

10.1007/978-1-4757-3415-7_4 ◽

2001 ◽

pp. 89-123

Author(s):

Jiang Hu ◽

Sachin S. Sapatnekar

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Modern Standard-cell Placement Techniques

Network Theory and Applications - Layout Optimization in VLSI Design ◽

10.1007/978-1-4757-3415-7_3 ◽

2001 ◽

pp. 45-87

Author(s):

Xiaojian Yang ◽

Elaheh Bozorgzadeh ◽

Majid Sarrafzadeh ◽

Maogang Wang

Keyword(s):

Standard Cell ◽

Cell Placement ◽

Modern Standard

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Modeling and Characterization of IC Interconnects and Packagings for the Signal Integrity Verification of High-Performance VLSI Circuits

Network Theory and Applications - Layout Optimization in VLSI Design ◽

10.1007/978-1-4757-3415-7_7 ◽

2001 ◽

pp. 191-259

Author(s):

Yungseon Eo

Keyword(s):

High Performance ◽

Signal Integrity ◽

Vlsi Circuits ◽

Integrity Verification

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Tradeoffs in Digital Binary Adder Design: the effects of floorplanning, number of levels of metals, and supply voltage on performance and area

Network Theory and Applications - Layout Optimization in VLSI Design ◽

10.1007/978-1-4757-3415-7_8 ◽

2001 ◽

pp. 261-288 ◽

Author(s):

Vitit Kantabutra ◽

Stefania Perri ◽

Pasquale Corsonello

Keyword(s):

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Interconnect Modeling and Design With Consideration of Inductance

Network Theory and Applications - Layout Optimization in VLSI Design ◽

10.1007/978-1-4757-3415-7_6 ◽

2001 ◽

pp. 155-190 ◽

Author(s):

Lei He

Keyword(s):

Interconnect Modeling

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Interconnect Planning

Network Theory and Applications - Layout Optimization in VLSI Design ◽

10.1007/978-1-4757-3415-7_2 ◽

2001 ◽

pp. 19-44

Author(s):

Jason Cong

Keyword(s):

Interconnect Planning

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Integrated Floorplanning and Interconnect Planning

Network Theory and Applications - Layout Optimization in VLSI Design ◽

10.1007/978-1-4757-3415-7_1 ◽

2001 ◽

pp. 1-18 ◽

Author(s):

Hung-Ming Chen ◽

Martin D. F. Wong ◽

Hai Zhou ◽

Fung-Yu Young ◽

Hannah H. Yang ◽

...

Keyword(s):

Interconnect Planning

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