Proceedings of the 28th Annual International Symposium on Microarchitecture
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Control flow prediction with tree-like subgraphs for superscalar processors

Proceedings of the 28th Annual International Symposium on Microarchitecture ◽

10.1109/micro.1995.476834 ◽

1995 ◽

Cited By ~ 26

Author(s):

S. Dutta ◽

M. Franklin

Keyword(s):

Control Flow ◽

Superscalar Processors ◽

Flow Prediction

An experimental study of several cooperative register allocation and instruction scheduling strategies

Proceedings of the 28th Annual International Symposium on Microarchitecture ◽

10.1109/micro.1995.476824 ◽

1995 ◽

Cited By ~ 11

Author(s):

C. Norris ◽

L.L. Pollock

Keyword(s):

Experimental Study ◽

Instruction Scheduling ◽

Scheduling Strategies

Petri net versus module scheduling for software pipelining

Proceedings of the 28th Annual International Symposium on Microarchitecture ◽

10.1109/micro.1995.476817 ◽

1995 ◽

Author(s):

V.H. Allan ◽

U.R. Shah ◽

K.M. Reddy

Keyword(s):

Petri Net ◽

Software Pipelining

Keynote address

Proceedings of the 28th Annual International Symposium on Microarchitecture ◽

10.1109/micro.1995.476807 ◽

1995 ◽

Cited By ~ 2

Author(s):

R.I. Baum

Keyword(s):

Keynote Address

Disjoint eager execution: an optimal form of speculative execution

Proceedings of the 28th Annual International Symposium on Microarchitecture ◽

10.1109/micro.1995.476841 ◽

1995 ◽

Cited By ~ 44

Author(s):

A.K. Uht ◽

V. Sindagi ◽

K. Hall

Keyword(s):

Speculative Execution ◽

Optimal Form

Decoupling integer execution in superscalar processors

Proceedings of the 28th Annual International Symposium on Microarchitecture ◽

10.1109/micro.1995.476838 ◽

1995 ◽

Cited By ~ 8

Author(s):

S. Palacharla ◽

J.E. Smith

Keyword(s):

Superscalar Processors

The performance impact of incomplete bypassing in processor pipelines

Proceedings of the 28th Annual International Symposium on Microarchitecture ◽

10.1109/micro.1995.476811 ◽

1995 ◽

Cited By ~ 30

Author(s):

P.S. Ahuja ◽

D.W. Clark ◽

A. Rogers

Keyword(s):

Performance Impact

An effective programmable prefetch engine for on-chip caches

Proceedings of the 28th Annual International Symposium on Microarchitecture ◽

10.1109/micro.1995.476831 ◽

1995 ◽

Cited By ~ 14

Author(s):

Tien-Fu Chen

Keyword(s):

On Chip

Spill-free parallel scheduling of basic blocks

Proceedings of the 28th Annual International Symposium on Microarchitecture ◽

10.1109/micro.1995.476819 ◽

1995 ◽

Cited By ~ 4

Author(s):

B. Natarajan ◽

M. Schlansker

Keyword(s):

Parallel Scheduling ◽

Basic Blocks

SPAID: software prefetching in pointer- and call-intensive environments

Proceedings of the 28th Annual International Symposium on Microarchitecture ◽

10.1109/micro.1995.476830 ◽

1995 ◽

Cited By ~ 44

Author(s):

M.H. Lipasti ◽

W.J. Schmidt ◽

S.R. Kunkel ◽

R.R. Roediger

Keyword(s):

Software Prefetching

Proceedings of the 28th Annual International Symposium on MicroarchitectureLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Control flow prediction with tree-like subgraphs for superscalar processors

An experimental study of several cooperative register allocation and instruction scheduling strategies

Petri net versus module scheduling for software pipelining

Keynote address

Disjoint eager execution: an optimal form of speculative execution

Decoupling integer execution in superscalar processors

The performance impact of incomplete bypassing in processor pipelines

An effective programmable prefetch engine for on-chip caches

Spill-free parallel scheduling of basic blocks

SPAID: software prefetching in pointer- and call-intensive environments

Proceedings of the 28th Annual International Symposium on Microarchitecture
Latest Publications