A Reconfigurable On-Chip Interconnection Network for Large Multicore Systems

2013 ◽  
pp. 1-30
Author(s):  
Mehdi Modarressi ◽  
Hamid Sarbazi-Azad
Keyword(s):  
Interconnection Network ◽  
Multicore Systems ◽  
On Chip

scholarly journals Level Based Routing Using Dynamic Programming for 2D Mesh

2017 ◽  
Vol 17 (2) ◽  
pp. 73-82 ◽  
Author(s):  
Akash Punhani ◽  
Pardeep Kumar ◽  
Nitin Nitin
Keyword(s):  
Dynamic Programming ◽  
Interconnection Network ◽  
Routing Algorithm ◽  
Networks On Chip ◽  
Mesh Topology ◽  
On Chip

Abstract The performance of the interconnection network doesn’t only depend on the topology, but it also depends on the Routing algorithm used. The simplest Routing algorithm for the mesh topology in networks on chip is the XY Routing algorithm. The level based Routing algorithm has been proved to be more efficient than the XY Routing algorithm. In this paper, level based Routing algorithm using the dynamic programming has been proposed. The proposed Routing algorithm proves to be more efficient in the terms of the computation. The proposed Routing algorithm has achieved up to two times bigger speed.

A full lifecycle performance verification methodology for multicore systems-on-chip

2012 ◽  
Vol 17 (3) ◽  
pp. 1-18
Author(s):  
Jim Holt ◽  
Jaideep Dastidar ◽  
David Lindberg ◽  
John Pape ◽  
Peng Yang
Keyword(s):  
Multicore Systems ◽  
Performance Verification ◽  
Systems On Chip ◽  
On Chip ◽  
Verification Methodology
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