A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)

Cryptographic Hardware and Embedded Systems — CHES 2001 - Lecture Notes in Computer Science ◽

10.1007/3-540-44709-1_18 ◽

2001 ◽

pp. 202-219 ◽

Author(s):

Johann Großschädl

Keyword(s):

Finite Fields ◽

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Efficient Bit Serial Multiplication in GF(2 m ) for a Class of Finite Fields

Information Networking - Lecture Notes in Computer Science ◽

10.1007/978-3-540-45235-5_75 ◽

2003 ◽

pp. 762-771

Author(s):

Soonhak Kwon ◽

Heuisu Ryu

Keyword(s):

Finite Fields ◽

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Low Complexity Bit Serial Systolic Multipliers over GF(2m) for Three Classes of Finite Fields

Information and Communications Security - Lecture Notes in Computer Science ◽

10.1007/3-540-36159-6_18 ◽

2002 ◽

pp. 209-216 ◽

Author(s):

Soonhak Kwon

Keyword(s):

Finite Fields ◽

Low Complexity ◽

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A low-power bit-serial multiplier for finite fields GF(2/sup m/)

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196) ◽

10.1109/iscas.2001.922163 ◽

2002 ◽

Author(s):

J. Grossschadl

Keyword(s):

Low Power ◽

Finite Fields ◽

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Bit Serial Multiplication in Finite Fields

SIAM Journal on Discrete Mathematics ◽

10.1137/0403012 ◽

1990 ◽

Vol 3 (1) ◽

pp. 140-148 ◽

Author(s):

Muzhong Wang ◽

Ian F. Blake

Keyword(s):

Finite Fields ◽

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A novel approach for bit-serial AB2 multiplication in finite fields GF(2m)

Computers & Mathematics with Applications ◽

10.1016/j.camwa.2005.07.019 ◽

2006 ◽

Vol 51 (6-7) ◽

pp. 1103-1112 ◽

Author(s):

Jun-Cheol Jeon ◽

Kee-Won Kim ◽

Kee-Young Yoo

Keyword(s):

Finite Fields ◽

Novel Approach ◽

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A Versatile Reconfigurable Bit-Serial Multiplier Architecture in Finite Fields GF(2m)

Communications in Computer and Information Science - Advances in Computer Science and Engineering ◽

10.1007/978-3-540-89985-3_28 ◽

2008 ◽

pp. 227-234 ◽

Author(s):

Morteza Nikooghadam ◽

Ehsan Malekian ◽

Ali Zakerolhosseini

Keyword(s):

Finite Fields ◽

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A versatile low power design of bit-serial multiplier in finite fields GF (2m)

2014 International Conference on Communication and Signal Processing ◽

10.1109/iccsp.2014.6949943 ◽

2014 ◽

Author(s):

Remy M ◽

Prabhu E ◽

Mangalam H

Keyword(s):

Low Power ◽

Finite Fields ◽

Low Power Design ◽

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Bit-serial systolic divider and multiplier for finite fields GF(2/sup m/)

IEEE Transactions on Computers ◽

10.1109/12.156540 ◽

1992 ◽

Vol 41 (8) ◽

pp. 972-980 ◽

Author(s):

M.A. Hasan ◽

V.K. Bhargava

Keyword(s):

Finite Fields ◽

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Low-power and high-speed design of a versatile bit-serial multiplier in finite fields GF(2 )

Integration ◽

10.1016/j.vlsi.2012.03.001 ◽

2013 ◽

Vol 46 (2) ◽

pp. 211-217 ◽

Author(s):

Ali Zakerolhosseini ◽

Morteza Nikooghadam

Keyword(s):

Low Power ◽

Finite Fields ◽

High Speed Design ◽

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Circuit architectures for semi-bit-serial and programmable arithmetic in finite fields

1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196) ◽

10.1109/icecs.1998.814020 ◽

2002 ◽

Author(s):

R. Furness ◽

M. Benaissa ◽

S.T.J. Fenn

Keyword(s):

Finite Fields ◽

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