Signal Delay in VLSI Systems

2008 ◽  
pp. 19-39
Keyword(s):  
Signal Delay

Do the Fillers Uh and Um Signal Delay in Spoken Discourse?

2004 ◽  
Author(s):  
Daniel C. O'Connell ◽  
Sabine Kowal
Keyword(s):  
Signal Delay ◽  
Spoken Discourse

scholarly journals Severe violations of independence in response inhibition tasks

2021 ◽  
Vol 7 (12) ◽  
pp. eabf4355
Author(s):  
Patrick G. Bissett ◽  
Henry M. Jones ◽  
Russell A. Poldrack ◽  
Gordon D. Logan
Keyword(s):  
Response Inhibition ◽  
Theoretical Foundation ◽  
Reaction Times ◽  
Stop Signal ◽  
Experimental Paradigm ◽  
Signal Delay ◽  
Independence Assumption ◽  
Analysis Techniques ◽  
Wide Range ◽  
Saccadic Responses

The stop-signal paradigm, a primary experimental paradigm for understanding cognitive control and response inhibition, rests upon the theoretical foundation of race models, which assume that a go process races independently against a stop process that occurs after a stop-signal delay (SSD). We show that severe violations of this independence assumption at short SSDs occur systematically across a wide range of conditions, including fast and slow reaction times, auditory and visual stop signals, manual and saccadic responses, and especially in selective stopping. We also reanalyze existing data and show that conclusions can change when short SSDs are excluded. Last, we suggest experimental and analysis techniques to address this violation, and propose adjustments to extant models to accommodate this finding.

TDC Implementation Based on Internal Delay Module of FPGA

2013 ◽  
Vol 816-817 ◽  
pp. 1063-1068
Author(s):  
Rou Gang Zhou ◽  
Yun Fei Zhou ◽  
Guang Dou Liu ◽  
Xiao Tu
Keyword(s):  
Nuclear Physics ◽  
Measurement Accuracy ◽  
Laser Interferometer ◽  
Interpolation Method ◽  
Time Measurement ◽  
Clock Signal ◽  
Signal Delay ◽  
Digital Conversion ◽  
Sampling Points ◽  
Stable Performance

Currently the time to digital converter (TDC) integrated in FPGA performs time-to-digital conversion in the carry chain mode and inter-slot offset is caused to be severe by internal wiring in the FPGA. Based on the carry chain interpolation method, this paper proposes the method for using a delay module in FPGA to achieve accurate signal delay. By calculating the phase difference of multi-clock signal between two latch sampling points, the interval between two sampling points was obtained. Experimental results indicate a measurement accuracy of 78ps or 52ps can be reached by precisely collecting time through the delay module in FPGA. Compared to the carry chain interpolation method, this method is significantly advantageous in small inter-slot offset, stable performance and convenient design and can meet the requirement for time measurement or requirement by laser interferometer with a nm-level accuracy in nuclear physics.

BOC signals processing by two traditional correlator channels

2021 ◽  
pp. 5-17
Author(s):  
O.K. Mikhaylova ◽  
I.V. Korogodin
Keyword(s):  
Direct Method ◽  
Tracking System ◽  
Practical Importance ◽  
Reference Signal ◽  
Processing Algorithm ◽  
Statistical Characteristics ◽  
Navigation Systems ◽  
Signal Delay ◽  
Signal Processing Algorithm ◽  
To Receive

Problem statement. With the development of satellite navigation systems, new navigation BOC signals are being introduced. Since the structure of BOC signals differs from traditional BPSK signals, this complicates their processing, which may require hardware changes and often leads to the need to develop new ones. Objective. Synthesis and analysis of the BOC signal processing algorithm using two BPSK correlators, comparable in accuracy to the direct method. Results. The synthesis and analysis of the BOC signal delay tracking system using two correlators, originally designed to receive only BPSK-conducting signals, are carried out. The statistical characteristics of the delay discriminator are obtained. It is shown how the accuracy and sensitivity of the obtained delay tracking algorithm are correlated with respect to the reference algorithm, which assumes the use of a signal with a digital subcarrier in the reference signal of the correlator. The pull-in characteristic are obtained. Practical relevance. The processing algorithm BOC signals that doesn't require modification of the traditional correlators of the navigation receiver is presented. This algorithm is of great practical importance, since it allows for high-precision reception of modern BOC and AltBOC signals, despite the limitations characteristic of modern navigation equipment. For example, this algorithm allows to receive Galileo E5 signals using the popular NTLab NT1065 chip. A new signal pull-in algorithm is proposed. This algorithm allows to avoid abnormal tracking errors caused by the operation of the tracking system in the side zones of the s-curve. The pull-in characteristics for various receive conditions are given.

Mathematical modeling of the nonlinear electrodynamics effect of signal delay in the magnetic field of pulsars

2015 ◽  
Vol 55 (11) ◽  
pp. 1857-1866 ◽  
Author(s):  
M. G. Gapochka ◽  
M. M. Denisov ◽  
I. P. Denisova ◽  
N. V. Kalenova ◽  
A. F. Korolev
Keyword(s):  
Mathematical Modeling ◽  
Magnetic Field ◽  
Nonlinear Electrodynamics ◽  
Signal Delay ◽  
The Magnetic Field

scholarly journals Optimal linewidth distribution minimizing average signal delay for RC limited circuits

1993 ◽  
Vol 74 (3) ◽  
pp. 407-410 ◽  
Author(s):  
HALDUN M. OZAKTAS ◽  
JOSEPH W. GOODMAN
Keyword(s):  
Signal Delay
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