Reconfigurable Networks-on-Chip

Author(s):  
Wim Heirman ◽  
Iñigo Artundo ◽  
Christof Debaes
Author(s):  
Sao-Jie Chen ◽  
Ying-Cherng Lan ◽  
Wen-Chung Tsai ◽  
Yu-Hen Hu

2010 ◽  
Vol 56 (7) ◽  
pp. 293-302 ◽  
Author(s):  
Yana E. Krasteva ◽  
Eduardo de la Torre ◽  
Teresa Riesgo

2014 ◽  
Vol 36 (5) ◽  
pp. 988-1003 ◽  
Author(s):  
Shuai ZHANG ◽  
Feng-Long SONG ◽  
Dong WANG ◽  
Zhi-Yong LIU ◽  
Dong-Rui FAN

2018 ◽  
Vol 8 (4) ◽  
pp. 39 ◽  
Author(s):  
Franco Fuschini ◽  
Marina Barbiroli ◽  
Marco Zoli ◽  
Gaetano Bellanca ◽  
Giovanna Calò ◽  
...  

Multi-core processors are likely to be a point of no return to meet the unending demand for increasing computational power. Nevertheless, the physical interconnection of many cores might currently represent the bottleneck toward kilo-core architectures. Optical wireless networks on-chip are therefore being considered as promising solutions to overcome the technological limits of wired interconnects. In this work, the spatial properties of the on-chip wireless channel are investigated through a ray tracing approach applied to a layered representation of the chip structure, highlighting the relationship between path loss, antenna positions and radiation properties.


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