CORDIC Algorithm for FPGA Implementation

Author(s):  
Sun-Ting Lin ◽  
Tzu-Hao Wang ◽  
Shou-Sheu Lin ◽  
Yan-Bang Li
2012 ◽  
Vol 2012 ◽  
pp. 1-8 ◽  
Author(s):  
Supriya Aggarwal ◽  
Kavita Khare

One of the most important steps in spectral analysis is filtering, where window functions are generally used to design filters. In this paper, we modify the existing architecture for realizing the window functions using CORDIC processor. Firstly, we modify the conventional CORDIC algorithm to reduce its latency and area. The proposed CORDIC algorithm is completely scale-free for the range of convergence that spans the entire coordinate space. Secondly, we realize the window functions using a single CORDIC processor as against two serially connected CORDIC processors in existing technique, thus optimizing it for area and latency. The linear CORDIC processor is replaced by a shift-add network which drastically reduces the number of pipelining stages required in the existing design. The proposed design on an average requires approximately 64% less pipeline stages and saves up to 44.2% area. Currently, the processor is designed to implement Blackman windowing architecture, which with slight modifications can be extended to other widow functions as well. The details of the proposed architecture are discussed in the paper.


2017 ◽  
Vol 60 (2) ◽  
pp. 332-337
Author(s):  
Debaprasad De ◽  
K. Kumar ◽  
Archisman Ghosh ◽  
Anurup Saha

2015 ◽  
Vol 8 (6) ◽  
pp. 217-228 ◽  
Author(s):  
Rui Xu ◽  
Zhanpeng Jiang ◽  
Hai Huang ◽  
Changchun Dong

2013 ◽  
Vol 63 (6) ◽  
pp. 39-45 ◽  
Author(s):  
Nihel Neji ◽  
Anis Boudabous ◽  
Wajdi Kharrat ◽  
Nouri Masmoudi

2005 ◽  
Vol 23 (11) ◽  
pp. 1009-1017 ◽  
Author(s):  
Si Mahmoud Karabernou ◽  
Fayçal Terranti

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