Dealing with Layers of Obfuscation in Pseudo-Uniform Memory Architectures

Euro-Par 2016: Parallel Processing Workshops - Lecture Notes in Computer Science ◽

10.1007/978-3-319-58943-5_55 ◽

2017 ◽

pp. 685-696

Author(s):

Randolf Rotta ◽

Robert Kuban ◽

Mark Simon Schöps ◽

Jörg Nolte

Keyword(s):

Memory Architectures

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Effective Memory Architectures of Multi-Processor Systems-on-Chip

Recent Patents on Electrical Engineering ◽

10.2174/1874476111003030218 ◽

2010 ◽

Vol 3 (3) ◽

pp. 218-231

Author(s):

Ni Zhou ◽

Fei Qiao ◽

Huazhong Yang ◽

Hui Wang

Keyword(s):

Systems On Chip ◽

On Chip ◽

Memory Architectures

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Low-cost display-memory architectures for multiwindow full-motion video and graphics

10.1117/12.171713 ◽

1994 ◽

Author(s):

A. A. de Lange ◽

G. D. La Hei

Keyword(s):

Low Cost ◽

Display Memory ◽

Memory Architectures ◽

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Implementing actor-based primitives on distributed-memory architectures

ACM SIGPLAN OOPS Messenger ◽

10.1145/127070.127078 ◽

1991 ◽

Vol 2 (2) ◽

pp. 45-49 ◽

Author(s):

Michele Di Santo ◽

Giulio Iannello

Keyword(s):

Distributed Memory ◽

Memory Architectures

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Overcoming the startup time problem in distributed memory architectures

10.1109/hicss.1991.183927 ◽

2002 ◽

Author(s):

W. Schroeder-Preikschat

Keyword(s):

Distributed Memory ◽

Time Problem ◽

Startup Time ◽

Memory Architectures

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Transactions in the Era of Non Volatile Memory and Heterogeneous Memory Architectures

Companion of the ACM/SPEC International Conference on Performance Engineering ◽

10.1145/3447545.3451904 ◽

2021 ◽

Author(s):

Paolo Romano

Keyword(s):

Non Volatile Memory ◽

Volatile Memory ◽

Memory Architectures

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Fundamental limits on the precision of in-memory architectures

Proceedings of the 39th International Conference on Computer-Aided Design ◽

10.1145/3400302.3416344 ◽

2020 ◽

Author(s):

Sujan K. Gonugondla ◽

Charbel Sakr ◽

Hassan Dbouk ◽

Naresh R. Shanbhag

Keyword(s):

Fundamental Limits ◽

Memory Architectures

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LSTMs for Keyword Spotting with ReRAM-based Compute-In-Memory Architectures

2021 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas51556.2021.9401295 ◽

2021 ◽

Author(s):

Clemens JS Schaefer ◽

Mark Horeni ◽

Pooria Taheri ◽

Siddharth Joshi

Keyword(s):

Keyword Spotting ◽

Memory Architectures

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A Survey of Neuromorphic Computing-in-Memory: Architectures, Simulators and Security

IEEE Design and Test ◽

10.1109/mdat.2021.3102013 ◽

2021 ◽

pp. 1-1

Author(s):

Felix Staudigl ◽

Farhad Merchant ◽

Rainer Leupers

Keyword(s):

Neuromorphic Computing ◽

Memory Architectures

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Realising a concurrent object-based programming model on parallel virtual shared memory architectures

Programming Models for Massively Parallel Computers ◽

10.1109/pmmpc.1995.504345 ◽

2002 ◽

Author(s):

M. Fisher ◽

J. Keane

Keyword(s):

Shared Memory ◽

Programming Model ◽

Object Based ◽

Virtual Shared Memory ◽

Memory Architectures ◽

Shared Memory Architectures

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Analytic evaluation of shared-memory architectures

IEEE Transactions on Parallel and Distributed Systems ◽

10.1109/tpds.2003.1178880 ◽

2003 ◽

Vol 14 (2) ◽

pp. 166-180 ◽

Author(s):

D.J. Sorin ◽

J.L. Lemon ◽

D.L. Eager ◽

M.K. Vernon

Keyword(s):

Shared Memory ◽

Analytic Evaluation ◽

Memory Architectures ◽

Shared Memory Architectures

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