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Cryptographic Side-Channels from Low-Power Cache Memory
Cryptography and Coding - Lecture Notes in Computer Science
◽
10.1007/978-3-540-77272-9_11
◽
2007
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pp. 170-184
◽
Cited By ~ 6
Author(s):
Philipp Grabher
◽
Johann Großschädl
◽
Daniel Page
Keyword(s):
Low Power
◽
Cache Memory
◽
Side Channels
Download Full-text
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Critical race-free low-power NAND match line content addressable memory tagged cache memory
IET Computers & Digital Techniques
◽
10.1049/iet-cdt:20070040
◽
2008
◽
Vol 2
(1)
◽
pp. 40
◽
Cited By ~ 6
Author(s):
V. Chaudhary
◽
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◽
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◽
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Keyword(s):
Low Power
◽
Cache Memory
◽
Critical Race
◽
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A fast low power embedded cache memory design
ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549)
◽
10.1109/icasic.2001.982626
◽
2002
◽
Author(s):
Zhao Xue-mei
◽
Ye Yi-zheng
◽
Yu Ming-yan
◽
Li Xiao-ming
Keyword(s):
Low Power
◽
Cache Memory
◽
Memory Design
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A reusability-aware cache memory sharing technique for high-performance low-power CMPs with private L2 caches
Proceedings of the 2007 international symposium on Low power electronics and design - ISLPED '07
◽
10.1145/1283780.1283793
◽
2007
◽
Cited By ~ 3
Author(s):
Sungjune Youn
◽
Hyunhee Kim
◽
Jihong Kim
Keyword(s):
Low Power
◽
High Performance
◽
Cache Memory
◽
Memory Sharing
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Effective Algorithm for the Low-Power Set-Associative Cache Memory
IEMEK Journal of Embedded Systems and Applications
◽
10.14372/iemek.2014.9.1.25
◽
2014
◽
Vol 9
(1)
◽
pp. 25-32
Author(s):
Bo-Sung Jung
◽
Jung-Hoon Lee
Keyword(s):
Low Power
◽
Cache Memory
◽
Effective Algorithm
◽
Power Set
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A Class Project For Low Power Cache Memory Architecture
10.18260/1-2--6
◽
2020
◽
Author(s):
Yul Chu
Keyword(s):
Low Power
◽
Cache Memory
◽
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◽
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Design of Cache Memory with Cache Controller for Low Power
10.24001/ijaems.icsesd2017.121
◽
2017
◽
Author(s):
Ms.Amruta G Shewne
◽
Prof. Mayuri Chawla
Keyword(s):
Low Power
◽
Cache Memory
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An automatic-power-save cache memory for low-power RISC processors
1995 IEEE Symposium on Low Power Electronics. Digest of Technical Papers
◽
10.1109/lpe.1995.482463
◽
2002
◽
Cited By ~ 4
Author(s):
Y. Shimazaki
◽
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◽
K. Norisue
◽
S. Narita
◽
K. Uchiyama
◽
...
Keyword(s):
Low Power
◽
Cache Memory
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Low Power Single Bit Cache Memory Architecture
Materials Today Proceedings
◽
10.1016/j.matpr.2021.02.725
◽
2021
◽
Author(s):
Reeya Agrawal
◽
Manish Kumar
Keyword(s):
Low Power
◽
Cache Memory
◽
Memory Architecture
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Low-power cache memory with state-of-the-art STT-MRAM for high-performance processors
2015 International SoC Design Conference (ISOCC)
◽
10.1109/isocc.2015.7401759
◽
2015
◽
Cited By ~ 4
Author(s):
Susumu Takeda
◽
Hiroki Noguchi
◽
Kumiko Nomura
◽
Shinobu Fujita
◽
Shinobu Miwa
◽
...
Keyword(s):
Low Power
◽
High Performance
◽
State Of The Art
◽
Cache Memory
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Low power and high density STT-MRAM for embedded cache memory using advanced perpendicular MTJ integrations and asymmetric compensation techniques
2014 IEEE International Electron Devices Meeting
◽
10.1109/iedm.2014.7047123
◽
2014
◽
Cited By ~ 14
Author(s):
K. Ikegami
◽
H. Noguchi
◽
C. Kamata
◽
M. Amano
◽
K. Abe
◽
...
Keyword(s):
Low Power
◽
High Density
◽
Cache Memory
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