Parameterized Path Based Randomized Oblivious Minimal Path Routing with Fault Tolerance in 2D Mesh Network on Chip

Advances in Intelligent and Soft Computing - Proceedings of the 2011 2nd International Congress on Computer Applications and Computational Science ◽

10.1007/978-3-642-28308-6_9 ◽

2012 ◽

pp. 63-70

Author(s):

Mushtaq Ahmed ◽

Vijay Laxmi ◽

M. S. Gaur ◽

Yogesh Meena

Keyword(s):

Fault Tolerance ◽

Network On Chip ◽

Mesh Network ◽

Minimal Path ◽

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Implementation of Techniques for Fault Tolerance in a Network-on-Chip

2010 11th Symposium on Computing Systems ◽

10.1109/wscad-scc.2010.28 ◽

2010 ◽

Author(s):

Fabric Veiga ◽

Cesar Albenes Zeferino

Keyword(s):

Fault Tolerance ◽

Network On Chip ◽

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A multi-wavelength communication strategy for 2D-mesh Network-on-Chip

IEICE Electronics Express ◽

10.1587/elex.9.706 ◽

2012 ◽

Vol 9 (7) ◽

pp. 706-711

Author(s):

Xiaoshan Yu ◽

Huaxi Gu ◽

Yingtang Yang ◽

Luying Bai ◽

Hua You

Keyword(s):

Network On Chip ◽

Communication Strategy ◽

Mesh Network ◽

Multi Wavelength ◽

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A case of area- and energy-efficient heterogeneous mesh network-on-chip

Proceedings of the 3rd International Conference on Computer Science and Service System ◽

10.2991/csss-14.2014.38 ◽

2014 ◽

Author(s):

Jili Yan ◽

Guoming Lai ◽

Xiaola Lin

Keyword(s):

Energy Efficient ◽

Network On Chip ◽

Mesh Network ◽

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RAMAN: Reinforcement Learning Inspired Algorithm for Mapping Applications onto Mesh Network-on-Chip

10.1109/slip52707.2021.00019 ◽

2021 ◽

Author(s):

Jitesh Choudhary ◽

Soumya J ◽

Linga Reddy Cenkeramaddi

Keyword(s):

Reinforcement Learning ◽

Network On Chip ◽

Mesh Network ◽

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On the Use of Multiplanes on a 2D Mesh Network-on-Chip

Algorithms and Architectures for Parallel Processing - Lecture Notes in Computer Science ◽

10.1007/978-3-642-24669-2_27 ◽

2011 ◽

pp. 276-286

Author(s):

Cruz Izu

Keyword(s):

Network On Chip ◽

Mesh Network ◽

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Network-on-Chip Implementation of Midimew-Connected Mesh Network

2013 International Conference on Parallel and Distributed Computing, Applications and Technologies ◽

10.1109/pdcat.2013.48 ◽

2013 ◽

Author(s):

Md Rabiul Awal ◽

M. M. Hafizur Rahman

Keyword(s):

Network On Chip ◽

Mesh Network ◽

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S2DIO: an extended scalable 2D mesh network-on-chip routing reconfiguration for efficient bypass of link failures

The Journal of Supercomputing ◽

10.1007/s11227-019-02915-5 ◽

2019 ◽

Vol 75 (10) ◽

pp. 6855-6881 ◽

Author(s):

Anugrah Jain ◽

Vijay Laxmi ◽

Meenakshi Tripathi ◽

Manoj Singh Gaur ◽

Rimpy Bishnoi

Keyword(s):

Network On Chip ◽

Mesh Network ◽

Link Failures ◽

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An enhanced model for reliable deflection routing in mesh network on chip

International Journal of High Performance Systems Architecture ◽

10.1504/ijhpsa.2017.087166 ◽

2017 ◽

Vol 7 (2) ◽

pp. 87

Author(s):

Simi Zerine Sleeba ◽

M.G. Mini

Keyword(s):

Network On Chip ◽

Mesh Network ◽

Deflection Routing ◽

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Energy and Throughput Analysis of Multicast Routing Algorithm for 2D Mesh Network on Chip

Procedia Engineering ◽

10.1016/j.proeng.2012.01.845 ◽

2012 ◽

Vol 30 ◽

pp. 144-151

Author(s):

U. Saravanakumar ◽

R. Rangarajan

Keyword(s):

Multicast Routing ◽

Routing Algorithm ◽

Network On Chip ◽

Mesh Network ◽

Throughput Analysis ◽

On Chip ◽

Multicast Routing Algorithm

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A Strategy for Interconnect Testing in Stacked Mesh Network-on-Chip

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.21 ◽

2010 ◽

Author(s):

Min-Ju Chan ◽

Chun-Lung Hsu

Keyword(s):

Network On Chip ◽

Mesh Network ◽

Interconnect Testing ◽

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