Implementation of Techniques for Fault Tolerance in a Network-on-Chip

Author(s):  
Fabric Veiga ◽  
Cesar Albenes Zeferino
2021 ◽  
pp. 767-775
Author(s):  
Jayshree ◽  
Gopalakrishnan Seetharaman ◽  
Debadatta Pati

2017 ◽  
Vol 15 (6) ◽  
pp. 1034-1042 ◽  
Author(s):  
Thiago Felski Pereira ◽  
Douglas Rossi de Melo ◽  
Eduardo Augusto Bezerra ◽  
Cesar Albenes Zeferino

2011 ◽  
Vol 2011 ◽  
pp. 1-15 ◽  
Author(s):  
Onur Derin ◽  
Erkan Diken ◽  
Leandro Fiorin

Kahn process networks (KPNs) is a distributed model of computation used for describing systems where streams of data are transformed by processes executing in sequence or parallel. Autonomous processes communicate through unbounded FIFO channels in absence of a global scheduler. In this work, we propose a task-aware middleware concept that allows adaptivity in KPN implemented over a Network on Chip (NoC). We also list our ideas on the development of a simulation platform as an initial step towards creating fault tolerance strategies for KPNs applications running on NoCs. In doing that, we extend our SACRE (Self-Adaptive Component Run Time Environment) framework by integrating it with an open source NoC simulator, Noxim. We evaluate the overhead that the middleware brings to the the total execution time and to the total amount of data transferred in the NoC. With this work, we also provide a methodology that can help in identifying the requirements and implementing fault tolerance and adaptivity support on real platforms.


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