Shrinking L1 Instruction Caches to Improve Energy–Delay in SMT Embedded Processors

Architecture of Computing Systems – ARCS 2013 - Lecture Notes in Computer Science ◽

10.1007/978-3-642-36424-2_22 ◽

2013 ◽

pp. 256-267

Author(s):

Alexandra Ferrerón-Labari ◽

Marta Ortín-Obón ◽

Darío Suárez-Gracia ◽

Jesús Alastruey-Benedé ◽

Víctor Viñals-Yúfera

Keyword(s):

Embedded Processors ◽

Instruction Caches

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On the characterization and optimization of system-level vulnerability for instruction caches in embedded processors

Microprocessors and Microsystems ◽

10.1016/j.micpro.2015.09.011 ◽

2015 ◽

Vol 39 (8) ◽

pp. 686-692 ◽

Cited By ~ 5

Author(s):

Shuai Wang ◽

Guangshan Duan

Keyword(s):

System Level ◽

Embedded Processors ◽

Instruction Caches

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Energy-efficient design for highly associative instruction caches in next-generation embedded processors

Proceedings Design, Automation and Test in Europe Conference and Exhibition ◽

10.1109/date.2004.1269095 ◽

2004 ◽

Cited By ~ 1

Author(s):

Aragon JL ◽

D. Nicolaescu ◽

A. Veidenbaum ◽

A.-M. Badulescu

Keyword(s):

Energy Efficient ◽

Embedded Processors ◽

Next Generation ◽

Efficient Design ◽

Energy Efficient Design ◽

Instruction Caches

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Fast Montgomery Modular Multiplication and Squaring on Embedded Processors

IEICE Transactions on Communications ◽

10.1587/transcom.2016ebp3189 ◽

2017 ◽

Vol E100.B (5) ◽

pp. 680-690 ◽

Cited By ~ 1

Author(s):

Yang LI ◽

Jinlin WANG ◽

Xuewen ZENG ◽

Xiaozhou YE

Keyword(s):

Embedded Processors ◽

Modular Multiplication ◽

Montgomery Modular Multiplication

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Programming languages. C. Extensions to support embedded processors

10.3403/03148804u ◽

2015 ◽

Keyword(s):

Programming Languages ◽

Embedded Processors

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A retargetable register allocation framework for embedded processors

Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools - LCTES '04 ◽

10.1145/997163.997192 ◽

2004 ◽

Cited By ~ 6

Author(s):

Jean-Marc Daveau ◽

Thomas Thery ◽

Thierry Lepley ◽

Miguel Santana

Keyword(s):

Embedded Processors

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Fast FPGA-based fault injection tool for embedded processors

International Symposium on Quality Electronic Design (ISQED) ◽

10.1109/isqed.2013.6523654 ◽

2013 ◽

Cited By ~ 8

Author(s):

M. S. Shirazi ◽

B. Morris ◽

H. Selvaraj

Keyword(s):

Fault Injection ◽

Embedded Processors

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Customizable Fault Tolerant Caches for Embedded Processors

2006 International Conference on Computer Design ◽

10.1109/iccd.2006.4380802 ◽

2006 ◽

Cited By ~ 4

Author(s):

Subramanian Ramaswamy ◽

Sudhakar Yalamanchili

Keyword(s):

Fault Tolerant ◽

Embedded Processors

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Efficient Code Compression for Embedded Processors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2008.2001950 ◽

2008 ◽

Vol 16 (12) ◽

pp. 1696-1707 ◽

Cited By ~ 8

Author(s):

Talal Bonny ◽

JÖrg Henkel

Keyword(s):

Embedded Processors ◽

Code Compression ◽

Efficient Code

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Hardware-managed register allocation for embedded processors

ACM SIGPLAN Notices ◽

10.1145/998300.997191 ◽

2004 ◽

Vol 39 (7) ◽

pp. 192-201 ◽

Cited By ~ 1

Author(s):

Xiaotong Zhuang ◽

Tao Zhang ◽

Santosh Pande

Keyword(s):

Embedded Processors

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NTB branch predictor: dynamic branch predictor for high-performance embedded processors

The Journal of Supercomputing ◽

10.1007/s11227-014-1280-0 ◽

2014 ◽

Vol 72 (5) ◽

pp. 1679-1693 ◽

Cited By ~ 1

Author(s):

Cong Thuan Do ◽

Hong Jun Choi ◽

Dong Oh Son ◽

Jong Myon Kim ◽

Cheol Hong Kim

Keyword(s):

High Performance ◽

Embedded Processors ◽

Branch Predictor

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