Performance Evaluation and Scalability Analysis of NPB-MZ on Intel Xeon Phi Coprocessor

Author(s):  
Yuqian Li ◽  
Yonggang Che ◽  
Zhenghua Wang
Author(s):  
Arunmoezhi Ramachandran ◽  
Jerome Vienne ◽  
Rob Van Der Wijngaart ◽  
Lars Koesterke ◽  
Ilya Sharapov

2015 ◽  
Vol 2015 ◽  
pp. 1-10
Author(s):  
P. Schweitzer ◽  
S. Cipière ◽  
A. Dufaure ◽  
H. Payno ◽  
Y. Perrot ◽  
...  

The objective of this study is to evaluate the performances of Intel Xeon Phi hardware accelerators for Geant4 simulations, especially for multithreaded applications. We present the complete methodology to guide users for the compilation of their Geant4 applications on Phi processors. Then, we propose series of benchmarks to compare the performance of Xeon CPUs and Phi processors for a Geant4 example dedicated to the simulation of electron dose point kernels, the TestEm12 example. First, we compare a distributed execution of a sequential version of the Geant4 example on both architectures before evaluating the multithreaded version of the Geant4 example. If Phi processors demonstrated their ability to accelerate computing time (till a factor 3.83) when distributing sequential Geant4 simulations, we do not reach the same level of speedup when considering the multithreaded version of the Geant4 example.


2016 ◽  
Author(s):  
Ken-Ichi Ishikawa ◽  
Taisuke Boku ◽  
Yoshinobu Kuramashia ◽  
Lawrence Meadows ◽  
Michael D‘Mello ◽  
...  

Author(s):  
Yaakoub El-Khamra ◽  
Niall Gaffney ◽  
David Walling ◽  
Eric Wernert ◽  
Weijia Xu ◽  
...  

2018 ◽  
Vol 175 ◽  
pp. 02009
Author(s):  
Carleton DeTar ◽  
Steven Gottlieb ◽  
Ruizi Li ◽  
Doug Toussaint

With recent developments in parallel supercomputing architecture, many core, multi-core, and GPU processors are now commonplace, resulting in more levels of parallelism, memory hierarchy, and programming complexity. It has been necessary to adapt the MILC code to these new processors starting with NVIDIA GPUs, and more recently, the Intel Xeon Phi processors. We report on our efforts to port and optimize our code for the Intel Knights Landing architecture. We consider performance of the MILC code with MPI and OpenMP, and optimizations with QOPQDP and QPhiX. For the latter approach, we concentrate on the staggered conjugate gradient and gauge force. We also consider performance on recent NVIDIA GPUs using the QUDA library.


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