Design of Low-Power Binary Content Addressable Memory for Future Nanotechnologies

Lecture Notes in Electrical Engineering - Microelectronics, Electromagnetics and Telecommunications ◽

10.1007/978-981-10-7329-8_35 ◽

2018 ◽

pp. 343-348

Author(s):

G. Surekha ◽

N. Balaji ◽

Y. Padma Sai

Keyword(s):

Low Power ◽

Content Addressable Memory

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A hybrid adiabatic content addressable memory for ultra low-power applications

Proceedings of the 13th ACM Great Lakes Symposium on VLSI - GLSVLSI '03 ◽

10.1145/764808.764828 ◽

2003 ◽

Author(s):

Aiyappan Natarajan ◽

David Jasinski ◽

Wayne Burleson ◽

Russell Tessier

Keyword(s):

Low Power ◽

Ultra Low Power ◽

Content Addressable Memory

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Design and Implementation of a Low Power Ternary Content Addressable Memory (TCAM)

2020 International SoC Design Conference (ISOCC) ◽

10.1109/isocc50952.2020.9333092 ◽

2020 ◽

Author(s):

Karthik S ◽

Karthick D ◽

Sanjaya M V ◽

Madhav Rao

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Design And Implementation ◽

Ternary Content Addressable Memory

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Low-Power Content Addressable Memory Using 2N-2N2P Circuits

2006 International Conference on Communications, Circuits and Systems ◽

10.1109/icccas.2006.285218 ◽

2006 ◽

Author(s):

Wu Yangbo ◽

Hu Jianping

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

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A low-power adiabatic content-addressable memory

2007 50th Midwest Symposium on Circuits and Systems ◽

10.1109/mwscas.2007.4488786 ◽

2007 ◽

Author(s):

Sheng Zhang ◽

Jianping Hu ◽

Dong Zhou

Keyword(s):

Low Power ◽

Content Addressable Memory

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Low Power High Performance Match Line Design of Content Addressable Memory

10.1109/isocc53507.2021.9614014 ◽

2021 ◽

Author(s):

Hyunju Kim ◽

Hyungtak Kim ◽

Youngmin Kim

Keyword(s):

Low Power ◽

High Performance ◽

Content Addressable Memory ◽

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New Precharge-free and Low-power Matchline Structure of Content Addressable Memory

10.1109/icce-asia53811.2021.9641910 ◽

2021 ◽

Author(s):

Sanghyun Lee ◽

Youngmin Kim

Keyword(s):

Low Power ◽

Content Addressable Memory

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Design of a Low-Power Content-Addressable Memory Using Double-Feedback Match-Line Sense Amplifiers

Advances in Mechanical and Electronic Engineering - Lecture Notes in Electrical Engineering ◽

10.1007/978-3-642-31528-2_68 ◽

2013 ◽

pp. 433-438 ◽

Author(s):

Meng-Chou Chang ◽

Ming-Hsun Hsieh ◽

Shih-Ju Tsai

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Power Content ◽

Sense Amplifiers

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Low-power content addressable memory design using two-layer P-N match-line control and sensing

Integration ◽

10.1016/j.vlsi.2020.06.001 ◽

2020 ◽

Vol 75 ◽

pp. 73-84

Author(s):

Sheikh Wasmir Hussain ◽

Telajala Venkata Mahendra ◽

Sandeep Mishra ◽

Anup Dandapat

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Memory Design ◽

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Design of Magnetic Tunnel Junction based Low Power Non-Volatile Ternary Content Addressable Memory

2019 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT) ◽

10.1109/rteict46194.2019.9016385 ◽

2019 ◽

Author(s):

Amoghraj ◽

Arunkumar P Chavan

Keyword(s):

Low Power ◽

Tunnel Junction ◽

Magnetic Tunnel Junction ◽

Content Addressable Memory ◽

Ternary Content Addressable Memory

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Low-power Ternary Content Addressable Memory (TCAM) array for network applications

2009 International Conference on Communications, Circuits and Systems ◽

10.1109/icccas.2009.5250516 ◽

2009 ◽

Author(s):

Ataur R. Patwary ◽

Bibiche M. Geuskens ◽

Shih-Lien L. Lu

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Network Applications ◽

Ternary Content Addressable Memory

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